Posted on May 17, 2011 at 09:48The flash programming manual documents 3 bits for configuring the LVD, but I only see one checkbutton in CAPS.
The 3 bits are
LVD_WNG_SEL (bit 3) (enable warning interrupt for 3.3 rail)
LVD_RST_SEL (bit 2) (enable reset for 3.3 rail)
LVD_TH (bit 1) (toggle 2.4 or 2.7 v threshold)
at JTAG address 0x520006. CAPS only has an option for LVD_TH. We have an external voltage supervisor, and I am sure that there is a hardware bug with the internal LVD, so I am trying to turn it off.
I'm also trying to disable it with firmware, using the FMI_Config() command in the 91x library, but it does weird things... It appears to be setting
a reserved bit to zero (bit 13), so I am worried that is changing an undocumented feature.
Using the RSIG command to read the flash configuration, I find that it is equal to 0x24CF before I issue this command:
FMI_Config(FMI_READ_WAIT_STATE_1,
FMI_WRITE_WAIT_STATE_1,
FMI_PWD_ENABLE,
FMI_LVD_DISABLE,
FMI_FREQ_LOW);
Afterwards, it is equal to 0x06CF, when I was expecting 0x26CF. I'm worried about the 0x2000 bit mask going to zero. What is this for?
