Bootloader for STR912

[dcramer]

Posted on March 20, 2008 at 15:07

Bootloader for STR912

[jilisegiar]

Posted on May 17, 2011 at 09:50

Which flash loader are using to load your code into Bank1

[dcramer]

Posted on May 17, 2011 at 09:50

I am trying to load a bootloader into Bank 1. I used Segger JLinkSTR91x.exe to set the default boot bank to 1, then I downloaded my code with IAR Embedded WorkBench 4.42. I then examined my memory with JMem.exe. Only the first sector from address 0 to 0x1fff contains my code. The code and data should go to 0x705b. If I load the code to bank 0, it will all load. Why is the code stop loading after the first sector in bank 1.

TIA

[dcramer]

Posted on May 17, 2011 at 09:50

I am using the workbench and loading it in debug mode.

[jilisegiar]

Posted on May 17, 2011 at 09:50

open

Project->options->debugger->Download to see which flash loader you are using.

[dcramer]

Posted on May 17, 2011 at 09:50

I am using FlashSTR91x.d79 for the flash downloader.

[enricol]

Posted on May 17, 2011 at 09:50

I am trying to understand the sample bootloader provided by ST as I need to port it from IAR to RIDE7(gcc) environment. To begin, I tried to write a simple blinking LED application and load it into Flash Bank 1, but failed...

Here is how I did it: 1) Erase the chip using JFlashARM.exe 2) Set default boot bank to 1 using Segger JLinkSTR91x.exe 3) Program the .hex file into the board using JFlashARM.exe I got the following errors: Programming failed @ address 0x00002000 (Algo13: Sector is locked) Failed to program targetBut if I set the boot bank back to 0, erase, and program, I won't get the error... why is that? Any help/hint would be greatly appreciated! Thanks :-Y [ This message was edited by: elai on 05-03-2008 23:19 ]

[jilisegiar]

Posted on May 17, 2011 at 09:50

@elai and @dcramer:

try to perform full chip erase using JlinkSTR91x.exe then try aging what you did.

[enricol]

Posted on May 17, 2011 at 09:50

Hi jilisegiar,

I tried erasing the chip using JlinkSTR91.exe according to:

http://null

1) Perform full chip erase.

Code:

Connecting to STR9: O.K.

J-Link>erase 0,ffffffff Erasing flash... J-Link>showconf Reading flash configuration register... ISC-CONFIGURATION: 0x0000-0000-0000-0000 Bit 0 = 0: Flash Bank 0 sector is not protec Bit 1 = 0: Flash Bank 0 sector is not protec Bit 2 = 0: Flash Bank 0 sector is not protec Bit 3 = 0: Flash Bank 0 sector is not protec Bit 4 = 0: Flash Bank 0 sector is not protec Bit 5 = 0: Flash Bank 0 sector is not protec Bit 6 = 0: Flash Bank 0 sector is not protec Bit 7 = 0: Flash Bank 0 sector is not protec Bit 32 = 0: Flash Bank 1 sector is not prote Bit 33 = 0: Flash Bank 1 sector is not prote Bit 34 = 0: Flash Bank 1 sector is not prote Bit 35 = 0: Flash Bank 1 sector is not prote Bit 48 = 0: CS 0 is mapped to main flash. Bit 49 = 0: LVD_th The LVD threshold is set Bit 50 = 0: LVD_RESET_SELECT LVD Reset Out i Bit 51 = 0: LVD_WARNING_SELECT Early Warning Bit 63 = 0: Lock Bit Write to unprogrammed O J-Link>blank Sector 0 (Flash 0): is blank Sector 1 (Flash 0): is blank Sector 2 (Flash 0): is blank Sector 3 (Flash 0): is blank Sector 4 (Flash 0): is blank Sector 5 (Flash 0): is blank Sector 6 (Flash 0): is blank Sector 7 (Flash 0): is blank Sector 32 (Flash 1): is blank Sector 33 (Flash 1): is blank Sector 34 (Flash 1): is blank Sector 35 (Flash 1): is blank Sector 49 (Configuration sector): is blank Sector 50 (User-Code): is blank Sector 51 (OTP Sector): is not blank 2) Set Boot Bank to Bank 1:

Code:

J-Link>setb 1

Writing flash configuration register... Writing O.K. CS1 is set to main flash. J-Link>showconf Reading flash configuration register... ISC-CONFIGURATION: 0x0001-0000-0000-0000 Bit 0 = 0: Flash Bank 0 sector is not protected. Bit 1 = 0: Flash Bank 0 sector is not protected. Bit 2 = 0: Flash Bank 0 sector is not protected. Bit 3 = 0: Flash Bank 0 sector is not protected. Bit 4 = 0: Flash Bank 0 sector is not protected. Bit 5 = 0: Flash Bank 0 sector is not protected. Bit 6 = 0: Flash Bank 0 sector is not protected. Bit 7 = 0: Flash Bank 0 sector is not protected. Bit 32 = 0: Flash Bank 1 sector is not protected. Bit 33 = 0: Flash Bank 1 sector is not protected. Bit 34 = 0: Flash Bank 1 sector is not protected. Bit 35 = 0: Flash Bank 1 sector is not protected. Bit 48 = 1: CS 1 is mapped to main flash Bit 49 = 0: LVD_th The LVD threshold is set to 2.4 V. Bit 50 = 0: LVD_RESET_SELECT LVD Reset Out is generated by VDD input onl Bit 51 = 0: LVD_WARNING_SELECT Early Warning is generated by VDD input o Bit 63 = 0: Lock Bit Write to unprogrammed OTP location is allowed. J-Link>blank Sector 0 (Flash 0): is blank Sector 1 (Flash 0): is blank Sector 2 (Flash 0): is blank Sector 3 (Flash 0): is blank Sector 4 (Flash 0): is blank Sector 5 (Flash 0): is blank Sector 6 (Flash 0): is blank Sector 7 (Flash 0): is blank Sector 32 (Flash 1): is blank Sector 33 (Flash 1): is blank Sector 34 (Flash 1): is blank Sector 35 (Flash 1): is blank Sector 49 (Configuration sector): is not blank Sector 50 (User-Code): is blank Sector 51 (OTP Sector): is not blank J-Link> q3) Now Open JFlashARM.exe and program the .hex file and still getting the same error message

[jmullens]

Posted on May 17, 2011 at 09:50

I was stuck here with this as well. My first nonideal solution was to use my own application to write to bank1 in the flash. When I switched banks using the Segger programmer, and used the Jflash utility to read back the memory, I would sometimes get odd behavior. I don't know how much I can trust the Segger J-flash (v3.78D), when running in bank1-boot mode. When I mapped the device to bank1, and read back the memory, I got the repeat of my bios code [0x0:0x79B7], in 0x8000, 0x10000,0x18000,0x20000, etc..

I have working applications in both Bank0 and Bank1, and know this memory display was bogus. I decided to try my luck with the HiTop debugger/Tantino-Jtag . I had the IAR (4.41A) compiler generate an .ELF file that I imported into the debugger. There is an option to choose that the bootbank will be. With a little bit of setup to specify the the Ram start address (0x4000000), the flash type,''STR9xF44_Bank1'', and the ''CSx Mapping - CS0 is mapped to the secondary flash, CS1 to main flash'', I was able to load and debug my code in bank1. Anecdotally, I was told that because the processor still generated interrupts after it was reset, this confused a lot of Jtag programmers. Hitex got around this by creating a Startup-script. I subsequently modified this to reflect the boot-bank remapping. I've included this file that needs to be renamed with the extension ''.scr'' I had to change the 91x_init.s file supplied with the USB and Ethernet download examples for bank1 operation and add the line: LDR R6, =0x54000000 LDR R7, =0x0 STR R7, [R6] Before these other lines: LDR R6, =0x54000004 ; non boot bank size LDR R7, =0x6 ; 512K STR R7, [R6] LDR R6, =0x5400000C ; boot bank address = Bank 1 LDR R7, =0x0 ; 0x0 STR R7, [R6] LDR R6, =0x54000010 ; non boot bank address = Bank 0 LDR R7, =0x20000 ; 0x10000 = 4x 0x4000 STR R7, [R6] LDR R6, =0x54000018 ; enable Non Boot bank LDR R7, =0x18 STR R7, [R6] Without it, my code did not work . Also, adding the IAR compiler intrinsic function __ramfunc() to the beginning of FMI_Config() in the 91x_fmi.c library, made this function work by after I remapped the flash. You must also make sure that you linker file, lnkarm_flash.xcl, beings at -DROMSTART=0x0 -DROMEND =0x7FFF