Posted on May 17, 2011 at 09:48#ifndef MINIMAL_BSP
// EMI = External Memory Interface
void BSP_EMI_Config(void) {
EMI_DeInit();
#if BOARD == BOARD_SP_SC
// configure CS0 and CS1
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Disable;
GPIO_Init (GPIO5, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Disable;
GPIO_Init (GPIO7, &GPIO_InitStructure);
GPIO_Init (GPIO8, &GPIO_InitStructure);
GPIO_Init (GPIO9, &GPIO_InitStructure);
// those bastards. this one pin out of 24 is on a different alt bus
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;
GPIO_Init (GPIO7, &GPIO_InitStructure);
// configure SCU
SCU_EMIModeConfig(SCU_EMI_DEMUX);
SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div1); // or SCU_EMIBCLK_Div1;
SCU->GPIOEMI = 1; // enable ports 8 & 9 for EMI
// SCU_EMIALEConfig( , ); not used
// configure EMI
EMI_InitTypeDef eMI_InitStruct;
EMI_StructInit(&eMI_InitStruct);
eMI_InitStruct.EMI_Bank_WSTRD = 4; // read wait states. determined empirically
eMI_InitStruct.EMI_Bank_WSTWR = 1; // write wait state. determined empirically
// we have 64KB on banks 0 and 1 each, so configure both
EMI_Init(EMI_Bank0, &eMI_InitStruct);
EMI_Init(EMI_Bank1, &eMI_InitStruct);
#endif
}
uint32_t BSP_SRAM_MemoryTest(void) {
#if BOARD == BOARD_SP_SC
// test. bank 0 is at 0x3800.0000 and bank1 is at 0x3C00.0000
// test low bits
uint8_t* bank0;
uint8_t* bank1;
bank0 = (uint8_t*) 0x38000000;
bank1 = (uint8_t*) 0x3C000000;
uint32_t errCount[2] = {0,0};
// write pattern A
for(int i=0;i<0x10000;i++) {
bank0[i] = 0xAA;
bank1[i] = 0x55;
}
for(int i=0;i<0x10000;i++) {
if (bank0[i] != 0xAA) {
errCount[0]++;
}
if (bank1[i] != 0x55) {
errCount[1]++;
}
}
// write pattern B
for(int i=0;i<0x10000;i++) {
bank0[i] = 0x55;
bank1[i] = 0xAA;
}
for(int i=0;i<0x10000;i++) {
if (bank0[i] != 0x55) {
errCount[0]++;
}
if (bank1[i] != 0xAA) {
errCount[1]++;
}
}
// write pattern C
for(int i=0;i<0x10000;i++) {
bank0[i] = (i & 0xFF);
bank1[i] = ~(i & 0xFF);
}
for(int i=0;i<0x10000;i++) {
if (bank0[i] != (i & 0xFF)) {
errCount[0]++;
}
if (bank1[i] != (uint8_t) ~(i & 0xFF)) {
errCount[1]++;
}
}
// write pattern D
for(int i=0;i<0x10000;i++) {
bank0[i] = ~(i & 0xFF);
bank1[i] = (i & 0xFF);
}
for(int i=0;i<0x10000;i++) {
if (bank1[i] != (i & 0xFF)) {
errCount[0]++;
}
if (bank0[i] != (uint8_t) ~(i & 0xFF)) {
errCount[1]++;
}
}
return errCount[0]+errCount[1];
#else
return 99999;
#endif
}