2009-03-19 01:16 PM
2011-05-17 12:58 AM
Hi Lakata,
Thanks for the feedback. I took a look at 91x_map.h, but mine doesn't have the DDR and CR2 fields - my last field is the PRS. I am not using the DMA on the ADC, so I guess that's why I haven't noticed before. I thought I had the latest version of the firmware library, but maybe a more recent one has been released. Chuck2011-05-17 12:58 AM
I'm running the A/D converter in scan mode, with 7 channels enabled. Conversion mode is single. I'm using a STR912FAW44. PCLK is 48 Mhz. I field the interrupt, clear the flag, read the conversions, then start the next conversion. If I use an ADC prescaler of 0xF0 or larger, all works fine. Using a value of 0xE0 or smaller causes me to hit a small # of interrupts, then no more. Here is my code:
ADC_InitTypeDef ADC_InitStructure; ADC_DeInit(); ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Channel_0_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_1_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_2_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_3_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_4_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_5_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Channel_6_Mode = ADC_NoThreshold_Conversion; ADC_InitStructure.ADC_Scan_Mode = ENABLE; ADC_InitStructure.ADC_Conversion_Mode = ADC_Single_Mode; ADC_Cmd(ENABLE); ADC_PrescalerConfig(0x80); ADC_Init(&ADC_InitStructure); VIC_Config(ADC_ITLine, VIC_IRQ, ADC_PRI); VIC_ITCmd(ADC_ITLine, ENABLE); ADC_ITConfig(ADC_IT_ECV, ENABLE); ADC_ConversionCmd(ADC_Conversion_Start); void ADCIsr(void) { int i; ADC_ClearFlag(ADC_FLAG_ECV); //clear the interrupt for(i = 0;i < 7;i++) Conversion_Value[i] = ADC_GetConversionValue(i); NewConversionReady = 1; ADC_ConversionCmd(ADC_Conversion_Start); } If I add some code in the ISR between clearing the flag and starting the next conversion to slow things down, I can get away with smaller values of the prescaler...down to 0xA0. Any idea what is going on? Thanks, Chuck Smith2011-05-17 12:58 AM
Actually, for the version of code I posted, I should have said a value of 0xF3 or greater works.
2011-05-17 12:58 AM
Edit 91x_map.h and change the register definition for ''DDR'' to be 32 bit (see snippet), not 16 bit. I had a confirmed silicon bug regarding this from ST Micro (not in the errata) that would crash my program under weird circumstances.
... vu32 DDR; /* ADC DMA Data Register ! NOW 32 BITS ! */ vu16 CR2; /* ADC Control Register2 */ vu16 EMPTY16; } ADC_TypeDef;