2006-12-12 08:26 PM
2006-12-12 06:49 AM
I am using an ST10F276 and I find that the ADBSY bit is always set after startup, long after the 40.629 clock pulses have passed for ADC initialisation. I do not configure the ADC so all registers contain their reset values. I have a 2.5V reference connected to the VAREF pin and a 22uF capacitor between VAREF and VAGND.
Can anyone help?