LSM9DS1 input-high voltage for CS inputs?

[Bill Burgess]

Posted on April 05, 2017 at 00:02

Although powering an LSM9DS1 with 2.8V to VDDIO and VDD, I would like to use a 1.8V-logic line for one of the chip selects for ease of retrofitting an existing design with minimum upheaval.  The line is push-pull, not open collector.

The sufficient-voltage threshold for a '1' digital input is usually labeled V_IH, but I could not find that parameter listed in the published specifications.  What is V_IH for the LSM9DS1 digital inputs, especially the chip selects?

A corollary question -- even if 1.8V will be sufficient fully to deselect the chip-select, would using 1.8 instead of 2.8V lead to increased power consumption?

Thanks!

#lsm9ds1

[Miroslav BATEK · Accepted solution]

Posted on April 05, 2017 at 15:04

Basicaly if VDDIO and VDD is equal to 2.8V, the threshold for Vhigh will be around 2.8V / 2 = 1.4V. So the output voltage of your system (with 1.8V logic) must drive the CS pin above this voltage.

Better solution is to connect pull-up on CS pin to 2.8V.

And the best solution is power the VDDIO line to 1.8V if possible. What about other communication pins I2C or SPI do you use 1.8V logic too?

The 1.8V on CS pin should not have any impact on current consumption.

[Bill Burgess]

Posted on April 06, 2017 at 18:30

This is wonderfully helpful, thanks.  I am stuck with a 2.8V SPI bus, so I have to use 2.8V for VDDIO.  The existing system has both 2.8 and 1.8V GPIO lines.  It will be very easy to repurpose a 1.8V GPIO for the chip select.  It would have been much more work to make a 2.8V GPIO available.  Again I am retrofitting an existing design, not starting from scratch, so my hands are somewhat tied.  Thanks again!