2025-01-19 10:10 PM
I use the official lsm6ds3tr-c-pid driver,Here is the code I initialized:
u8 who_amI = 0;
lsm6ds3tr_c_device_id_get(&dev_ctx, &who_amI);
if (who_amI != LSM6DS3TR_C_ID) {
printf("lsm6ds3tr_c_device_id_get err,%d,%d", who_amI, LSM6DS3TR_C_ID);
}
printf("LSM6DS3TR id:%x\n", who_amI);
lsm6ds3tr_c_reset_set(&dev_ctx, PROPERTY_ENABLE);
do {
lsm6ds3tr_c_reset_get(&dev_ctx, &rst);
} while (rst);
/* Enable Block Data Update */
lsm6ds3tr_c_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
/* Set full scale */
lsm6ds3tr_c_xl_full_scale_set(&dev_ctx, LSM6DS3TR_C_2g);
lsm6ds3tr_c_gy_full_scale_set(&dev_ctx, LSM6DS3TR_C_250dps);
lsm6ds3tr_c_int_notification_set(&dev_ctx, LSM6DS3TR_C_INT_PULSED);
lsm6ds3tr_c_pin_mode_set(&dev_ctx, LSM6DS3TR_C_PUSH_PULL);
lsm6ds3tr_c_pin_polarity_set(&dev_ctx, LSM6DS3TR_C_ACTIVE_HIGH);
lsm6ds3tr_c_int1_route_t int1_route = {0};
int1_route.int1_drdy_xl = PROPERTY_ENABLE;
int1_route.int1_drdy_g = PROPERTY_ENABLE;
u32 ret = lsm6ds3tr_c_pin_int1_route_set(&dev_ctx, int1_route);
if (ret != 0) {
printf("lsm6ds3tr_c_pin_int1_route_set err 2\n");
}
2025-01-19 10:13 PM
The code above missed the rate configuration, but adding the rate configuration below still doesn't work
u8 who_amI = 0;
lsm6ds3tr_c_device_id_get(&dev_ctx, &who_amI);
if (who_amI != LSM6DS3TR_C_ID) {
printf("lsm6ds3tr_c_device_id_get err,%d,%d", who_amI, LSM6DS3TR_C_ID);
}
printf("LSM6DS3TR id:%x\n", who_amI);
lsm6ds3tr_c_reset_set(&dev_ctx, PROPERTY_ENABLE);
do {
lsm6ds3tr_c_reset_get(&dev_ctx, &rst);
} while (rst);
/* Enable Block Data Update */
lsm6ds3tr_c_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
/* Set full scale */
lsm6ds3tr_c_xl_full_scale_set(&dev_ctx, LSM6DS3TR_C_2g);
lsm6ds3tr_c_gy_full_scale_set(&dev_ctx, LSM6DS3TR_C_250dps);
lsm6ds3tr_c_xl_data_rate_set(&dev_ctx, LSM6DS3TR_C_XL_ODR_104Hz);
lsm6ds3tr_c_gy_data_rate_set(&dev_ctx, LSM6DS3TR_C_GY_ODR_104Hz);
lsm6ds3tr_c_int_notification_set(&dev_ctx, LSM6DS3TR_C_INT_PULSED);
lsm6ds3tr_c_pin_mode_set(&dev_ctx, LSM6DS3TR_C_PUSH_PULL);
lsm6ds3tr_c_pin_polarity_set(&dev_ctx, LSM6DS3TR_C_ACTIVE_HIGH);
lsm6ds3tr_c_int1_route_t int1_route = {0};
int1_route.int1_drdy_xl = PROPERTY_ENABLE;
int1_route.int1_drdy_g = PROPERTY_ENABLE;
u32 ret = lsm6ds3tr_c_pin_int1_route_set(&dev_ctx, int1_route);
if (ret != 0) {
printf("lsm6ds3tr_c_pin_int1_route_set err 2\n");
}