LIS3DH FIFO Int generation

[peyman]

Posted on June 12, 2015 at 22:27

Hi all,

I am trying to use my LIS3DH in FIFO Stream mode.I am trying to configure the accelerator to generate an interrupt whenever the FIFO is full.However it never generates any interrupts.I have configured the registers as following:CTR_REG1= 0x57CTR_REG2=0x00CTR_REG3=0x02CTR_REG4=0x08CTR_REG5=0x48FIFO_CTR_REG=80I have noticed that when I read FIFO_SRC_REG for debugging the value is 0x20 which means that the FIFO is empty. Also when I read the value of FIFO_CTR_REG the value is 0x00!any idea?Regards,Peyman #lis3dh-fifo #lis3dh #lis3dh-interrupt

[johnray9]

Posted on November 17, 2015 at 16:33

Have you tried the chip in normal mode without fifo and can you see data values?