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How to read FIFO buffer data from lsm6dsox

Sprem.1
Associate III

Hi,

we are trying to read FIFO buffer data but we are facing some issues in output data from FIFO

can anyone help me regarding the FIFO register setting

what is the value to be configured in the FIFO register?

9 REPLIES 9
Sprem.1
Associate III

Can any please reply for this​

Eleon BORLINI
ST Employee

Hi @Sprem.1​ ,

In absence of specific details about the issue, would first suggest you to read LSM6DSOX application note, FIFO modes, from p.101.

0693W00000HpDgjQAF.pngYou can then have a loot to the Github examples in C, such as the lsm6dsox_fifo.c: these drivers implements the registers' settings, buffer reading and parsing in order to implement the FIFO mode on the LSM6DSOX.

If my reply answered your question, please click on Select as Best at the bottom of this post. This will help other users with the same issue to find the answer faster.

-Eleon

Sprem.1
Associate III

Thank you so much eleon we will try this and let you know ASAP

Sprem.1
Associate III

Hi, eleon,

can we say whether this FIFO setting is correct?

FIFO_CTRL1(07h) - 0x00

FIFO_CTRL2(08h ) - 0x00

FIFO_CTRL3(09h) - 0xA0(gyroscope - 6667Hz)

FIFO_CTRL4(0Ah ) - 0x01(FIFO mode)

COUNTER_BDR_REG1(0Bh) - 0x00

COUNTER_BDR_REG2(0Ch) - 0x00

time sleep - 6ms (collecting 40 samples)

Eleon BORLINI
ST Employee

Hi @Sprem.1​ ,

It should be OK, setting the FIFO mode this way. However, please pay attention to the gyro speed, which is quite high and which could cause the FIFO filling to fast without time to read it.

Otherwise, if you are facing issues, please try the online example (with your personal ODRs):

/*
   * Set FIFO watermark (number of unread sensor data TAG + 6 bytes stored in FIFO) to 10 samples
   */
  lsm6dsox_fifo_watermark_set(&dev_ctx, 10);
  /* Set FIFO batch XL/Gyro ODR to 12.5Hz */
  lsm6dsox_fifo_xl_batch_set(&dev_ctx, LSM6DSOX_XL_BATCHED_AT_12Hz5);
  lsm6dsox_fifo_gy_batch_set(&dev_ctx, LSM6DSOX_GY_BATCHED_AT_12Hz5);
  /* Set FIFO mode to Stream mode (aka Continuous Mode) */
  lsm6dsox_fifo_mode_set(&dev_ctx, LSM6DSOX_STREAM_MODE);
  /* Enable drdy 75 μs pulse: uncomment if interrupt must be pulsed */
  //lsm6dsox_data_ready_mode_set(&dev_ctx, LSM6DSOX_DRDY_PULSED);
  /* Set Output Data Rate */
  lsm6dsox_xl_data_rate_set(&dev_ctx, LSM6DSOX_XL_ODR_12Hz5);
  lsm6dsox_gy_data_rate_set(&dev_ctx, LSM6DSOX_GY_ODR_12Hz5);

-Eleon

Sprem.1
Associate III

Hi, eleon,

Thank you so much for your reply,

we are trying to run FIFO mode in a while loop but we observe that the FIFO buffer is not filling the second time

step 1: Configuration of Gyroscope control register and FIFO control register(6.6khz,2000dps,FIFO mode)

step 2: 100 ms delay --> 6.6Khz and 512 sample

step 3: while loop

step 4: reading x,y,z FIFO

step 5: Reading FIFO status register

step 6: 2s delay

step 7: Again Reading FIFO status register

step 8: Again it will go through step 3

can you suggest to me regarding this

Sprem.1
Associate III

Hi Team,

Finally, we got output from the FIFO buffer

ODR - 100 Hz(high-performance mode)

dps. - 2000 dps

FIFO mode - continuous mode

Sensor position - Rest position(static)

FIFO sample count :

Xdata : 8

Ydata : -4

Zdata : 0

Xdata : 8

Ydata : -6

Zdata : 1

Xdata : 7

Ydata : -5

Zdata : 4​

But we are facing one issue in the 6.6 and 3.3KHz ODR sample count except for these two ODR all the ODR sample count is correct according to the datasheet while in the Rest position

ODR - 6.6KHz(high-performance mode)

dps. - 2000 dps

FIFO mode - continuous mode

Sensor position - Rest position(static)

FIFO sample count :

Xdata : -206

Ydata : -5

Zdata : 17

Xdata : 24

Ydata : 14

Zdata : 4

Xdata : 256

Ydata : 201

Zdata : -12

Can anyone suggest some point why in high ODR 6.66 and 3.33KHz it is behaving like this? If we want to operate the sensor in high ODR what to do can anyone please reply to this​

Sprem.1
Associate III

Hi,

can anyone reply to the above query please

Eleon BORLINI
ST Employee

Hi @Sprem.1​ ,

So you are reading higher acceleration values (from the FIFO) in the higher ODR case, right? Are you facing the same issue without passing though the FIFO?

I'm wondering if it could be effectively a measurement "issue", in the sense that in your setup there is a noise at high frequency (above the 1kHz ODR) that is detected only when you run the device at high ODRs.

You might also try to increase the SPI / I2C reading frequency: maybe the ODR is too high to be able to read the FIFO fast enough.

-Eleon