2024-01-22 01:41 PM
Is it possible to configure the LIS2DH12 so that it can receive a clock from the host (master) instead of the clock being generated by the LIS2DH12? I'm looking a the quality of the LIS2DH generated clock and it is spectrally not pure and has a significant frequency error for my application.
2024-01-23 02:11 AM
Hi @sramo.11 ,
Are you referring to the clock on the bus? Or your problem is related to the ODR Error?
2024-01-30 08:37 AM
Hi Federica,
I'm referring to both clocks. My exact question is what is the relationship between the I2C SCL clock and the ODR rate? Is the ODR clock generated from the I2C SCL? For example, if I input 50kHz as an SCL clock will the accelerometer take that and divide it to generate say the 100Hz ODR?
2024-02-01 02:47 AM
Hi @sramo.11 ,
They are totally different: the i2c clock is the communication bus clock, the odr on the other hand is internal to the mems and is set by writing to the ODR registers.