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SPIRAW Function of S2LP-SFX-DK

CKim.18
Associate II

Please let me know the SpiRaw function data format in S2LP-SFX-DK.

in_buffer [0] - 0x00 is SPI Write, 0x01 is SPI READ, 0x80 is Command

in_buffer[1] - SPI Reigster Address or Command

in_buffer[2]~ - Write Data

3 REPLIES 3
Winfred LU
ST Employee

As you've already noticed:

in_buffer[0] : 0 = Write, 1 = Read, 0x80 = Command

in_buffer[1] : Register Address or Command

in_buffer[2 ~ n_bytes-1] : Data

Sometimes it is also used for raw data feeding into FIFO, in this case, the whole buffer contains data.

CKim.18
Associate II

I'm just integration via difference MCU. but, still have problem of tht "5.6.2 Transmitter data modes - Direct through FIFO mode". Register setting "#define PCKTCTRL1_ADDR ((uint8_t)0x30)" Value is 0x04.

Your reference design source using write below two FIFO data via S2LPSpiRaw function.

 0,FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

 0,FF,0,56,0,4C,0,49,0,42,0,39,0,33,0,2E,0,29,0,25,0,20,0,1E,0,1C,0,1A,0,18,

 0,17,0,16,0,15,0,13,0,13,0,11,0,11,0,10,0,10,0,F,0,F,0,E,0,E,0,D,0,D,0,D,0,

 D,0,C,0,C,0,C,0,C,0,C,0,B,0,B,0,B,0,B

Our using general FIFO access method

 0,FF, ==> FIFO Write Command 

 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ==> Data Write

 0,FF, ==> FIFI Write Command

 0,56,0,4C,0,49,0,42,0,39,0,33,0,2E,0,29,0,25,0,20,0,1E,0,1C,0,1A,0,18,

 0,17,0,16,0,15,0,13,0,13,0,11,0,11,0,10,0,10,0,F,0,F,0,E,0,E,0,D,0,D,0,D,0,

 D,0,C,0,C,0,C,0,C,0,C,0,B,0,B,0,B,0,B  ==> Data Write

after send to TX Command result to "IRQ_TX_FIFO_ERROR".

Could please let me know what is difference FIFO function method.

Thanks

CKim.18
Associate II

HI ST Micro Team

I have more trying coding for "S2LPSpiRaw" function. but, It is same result for "IRQ_LOW_BATT_LVL".

Also, Our Reference Design H/W via "X-NUCLEO-S2915A1" and reference source is "BLE-Sub1GHz DK_2.0.0"

The difference between this is the front end module (SKY66420 vs SKY66431).

Please let us know about this issue and any advice.

static void priv_ST_MANUF_rf_load_first_ramp_up()

-----

  /* fill the 1st part of the FIFO */

  priv_ST_MANUF_SpiRaw_Ramp(18, (uint8_t*)zeroes, NULL,0);

  priv_ST_MANUF_SpiRaw_Ramp(82, (uint8_t*)st_manuf_context->bpsk_ramps->fifo_start_ramp_up_1, NULL,0)

SPI FIFO WRITE DATA

E: ## S2LPSpiRaw ## n_butes= 12, can_return but = 0 

E: [0, FF, 0, 0, 0]

E: WR DATA : [0,ff,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,]

E: SF_LIB : priv_ST_MANUF_SpiRaw_Ramp pwr_reduction:[0]

V: =====================================================================

E: ## S2LPSpiRaw ## n_butes= 52, can_return but = 0

E: [0, FF, 0, 56, 0]

E: WR DATA : [0,ff,0,56,0,4c,0,49,0,42,0,39,0,33,0,2e,0,29,0,25,0,20,0,1e,0,1c,0,1a,0,18,0,17,0,16,0,15,0,13,0,13,0,11,0,11,0,10,0,10,0,f,0,f,0,e,0,e,0,d,0,d,0,d,0,d,0,c,0,c,0,c,0,c,0,c,0,b,0,b,0,b,0,b,]

V: =====================================================================