2022-11-24 12:25 PM
Is it possible to enter TX mode so it immediately starts sending the preamble and header bytes before any data is in the TX FIFO?
ie. Can the TX FIFO be filled during state transition (READY->LOCK->TX 70us+26us) and preamble time?
Or will the TX Underflow error trigger immediately?
2022-11-24 06:46 PM
Answering my own question but testing has revealed that it is possible to start TX then write to FIFO.