2020-09-15 07:07 AM
1. When using the SD interface of stid135 demodulation chip, we found that MCLK output driver is insufficient. We connect the data line of the SD and MCLK directly to the IO of the FPGA, and the FPGA grabs it online, so we can't get it? Can you solve this problem. We looked at the official assessment board, which is also directly connected.
2. Is the chip capable of receiving and processing Hughes' system?
2020-09-15 08:52 AM
Support for these chips likely needs to come directly from the ST engineers assigned to your account.
The FAE's might be able to give guidance with respect to issues they are aware of, but your staff will likely need to be responsible for board bring-up and debug work.