2023-06-28 09:16 AM - edited 2024-06-27 01:54 PM
2023-07-27 07:42 AM - edited 2023-09-01 06:15 AM
Hello
There are some problems with this approach. The VCSELs generate a lot of EMi. To avoid them, the sensors provide a bit of spread spectrum clock jitter. This keeps the relatively large, fast power on/off from screwing up all the chips around it by having one large EMI spike.
But it seems you want to use the VCSEL output of one chip and the RX of lots of chips.
To do this they all have to run in lock step. And the jitter would prevent this from working.
It might be that you can disable the EMI protection on the chip, but then you still have to find some way to keep them in lock step.
And interesting idea, but financially untenable.
Regards
Anne
2023-07-27 07:42 AM - edited 2023-09-01 06:15 AM
Hello
There are some problems with this approach. The VCSELs generate a lot of EMi. To avoid them, the sensors provide a bit of spread spectrum clock jitter. This keeps the relatively large, fast power on/off from screwing up all the chips around it by having one large EMI spike.
But it seems you want to use the VCSEL output of one chip and the RX of lots of chips.
To do this they all have to run in lock step. And the jitter would prevent this from working.
It might be that you can disable the EMI protection on the chip, but then you still have to find some way to keep them in lock step.
And interesting idea, but financially untenable.
Regards
Anne
2023-08-17 12:20 PM - edited 2024-06-27 01:55 PM
Deleted
2023-09-01 10:31 AM
Unfortuantely that is exactly want it means. This approach has advantages (to everyone but you). Our chips don't interfere with each other (very much) because they operate with slightly different timings. And they don't cause problems for all the other chips in the design.
To do what you are proposing, I think all the chips have to run on the same clock, otherwise slight variations in phase are going to make a mess of the timings.
- john