2024-08-05 01:46 PM
I have set up a project in STM32CubeMX.
I have setup both I2S1 for Receiving and I2S2 for Transmiting with DMA.
After the normal initalization i start receiving from the DMA:
if (HAL_I2S_Transmit_DMA(&hi2s2, (uint16_t*)&output_buffer, 1) != HAL_OK)
{
Error_Handler();
}
And the setup of the I2S are as following:
void MX_I2S1_Init(void)
{
hi2s1.Instance = SPI1;
hi2s1.Init.Mode = I2S_MODE_MASTER_RX;
hi2s1.Init.Standard = I2S_STANDARD_PHILIPS;
hi2s1.Init.DataFormat = I2S_DATAFORMAT_32B;
hi2s1.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
hi2s1.Init.AudioFreq = I2S_AUDIOFREQ_48K;
hi2s1.Init.CPOL = I2S_CPOL_LOW;
hi2s1.Init.FirstBit = I2S_FIRSTBIT_MSB;
hi2s1.Init.WSInversion = I2S_WS_INVERSION_DISABLE;
hi2s1.Init.Data24BitAlignment = I2S_DATA_24BIT_ALIGNMENT_LEFT;
hi2s1.Init.MasterKeepIOState = I2S_MASTER_KEEP_IO_STATE_ENABLE;
if (HAL_I2S_Init(&hi2s1) != HAL_OK)
{
Error_Handler();
}
}
void MX_I2S2_Init(void)
{
hi2s2.Instance = SPI2;
hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
hi2s2.Init.Standard = I2S_STANDARD_PHILIPS;
hi2s2.Init.DataFormat = I2S_DATAFORMAT_32B;
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_48K;
hi2s2.Init.CPOL = I2S_CPOL_LOW;
hi2s2.Init.FirstBit = I2S_FIRSTBIT_MSB;
hi2s2.Init.WSInversion = I2S_WS_INVERSION_DISABLE;
hi2s2.Init.Data24BitAlignment = I2S_DATA_24BIT_ALIGNMENT_LEFT;
hi2s2.Init.MasterKeepIOState = I2S_MASTER_KEEP_IO_STATE_DISABLE;
if (HAL_I2S_Init(&hi2s2) != HAL_OK)
{
Error_Handler();
}
}
The HAL_I2S_RxCpltCallback doesn't do anything right now and the I2S2 is not started with the DMA.
I am only using the MCLK, BCLK, and LRCLK, and have conneted the peripherals ADC and DAC to these and their DIN and DOUT are connected, so if MCLK, BCLK, and LRCLK I should have a clean connection, but the audio is choppy. I can see when measuring MCLK, BCLK, and LRCLK, their frequency sporadically go up, cutting the correct transfer, to then go back. The stuttering happens a few times per second.
I have spent a lot of time trying to fix this, but i have no idea how to fix it.
Solved! Go to Solution.
2024-08-06 10:35 AM
There are a few topics on this board regarding limitation of DMA access to memory on H7, try to search.
Also take some time to read:
AN4891 Application note
STM32H72x, STM32H73x, and single-core STM32H74x/75x system architecture and performance
2024-08-07 09:39 AM
What's the primary I2S clock source?
Is that stable?
JW
2024-08-07 10:27 AM
I am using the HSI -> PPL2P -> SPI1
2024-08-08 04:27 AM
So I have finally fixed the problem, my reluctancy to acknowledged using the HSI could be the problem has been my downfall.
I have tried adding 24.576 MHz to is2_ckin, and now everything is stable...
A lot of thanks to every one who has applied to the thread.