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I use jtag debugging m4 program, the following error, how should be resolvedOpen On-Chip Debugger 0.10.0+dev-01124-gbfb41e6 (2018-11-16-15:23)Licensed under GNU GPL v2For bug reports, read http://openocd.org/doc/doxygen/bugs.htmldebug_level: 1cortex_a interrupt mask oncortex_a interrupt mask oncortex_a domain access control fixup oncortex_a domain access control fixup on3333none separateadapter speed: 5000 kHzadapter_nsrst_assert_width: 200adapter_nsrst_delay: 200none srst_pulls_trstsrst_only srst_pulls_trst srst_gates_jtag srst_open_drain connect_deassert_srstError: Could not find MEM-AP to control the coreap 0 selected, csw 0x10006000Error: Target not examined yetundefined debug reason 7 - target needs resetError: Target not examined yetError: Could not find MEM-AP to control the coreError: Target not examined yetembedded:startup.tcl:24: Error: in procedure 'stm32mp15x.cpu2' called at file "embedded:startup.tcl", line 283in procedure 'ocd_bouncer' at file "embedded:startup.
Hello, I need to add a configuration, but I cannot solve this problem, I hope to get your support
After the execution of the function HAL_NVIC_SystemReset() the CM4 did not jump to the Reset_Handler in the startup file. It ends up in "Break at address "0xa05f000c" with no debug information available, or outside of program code."I know that it's working for other STM32F4.Any ideas?
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The touch screen part of stm32mp157c-dk2 does not need to be interrupted and reset?
I'm testing a stm32mp157a-dk1 in 85 °C for a project.The setup is basic, power from usb and network over ethernet to a control computer outside the chamber. I ssh in to the board to check that its alive and put some load on the cpu.Even without load. the board seems to crash, I lose the SSH connection and a led blinking blue goes dark, LD 7/8 I think.The STM32MP157-A should be rated for those conditions right ? could it be some peripheral chip on the board that causes the crash?Cheers
I need to test a 3.5" display connected to the LTDC port. How do I disable the 5.5" display that came with the STM32MP157C-EV1 board and use the 3.5" display? I see the ltdc_pins_a: ltdc-a-0{...} entry in the Linux source code device tree: ../linux-4.19.49/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi file.Do I need to use a Linux command to enable/disable the display? If yes how/what command?Thank you.Or do I need to edit the /etc/xdg/weston/weston.ini file? How?
Hi! Have some problems with installing fftw package. I tried to install it to st-image-weston and st-example-image-xfce, but received same error when bitbake run do_rootfs. Can anybody explain this problem?Build Configuration:BB_VERSION = "1.40.0"BUILD_SYS = "x86_64-linux"NATIVELSBSTRING = "universal"TARGET_SYS = "arm-openstlinux_x11-linux-gnueabi"MACHINE = "stm32mp1"DISTRO = "openstlinux-x11"DISTRO_VERSION = "2.6-snapshot-20191213"TUNE_FEATURES = "arm armv7ve vfp thumb neon vfpv4 callconvention-hard cortexa7"TARGET_FPU &nb
I am evaluating different dual-core ARM Cortex-A7 MPUs for their graphical features; one of my requirements is that I need to support a 1280x1024 TFT LCD at 50-60fps using 16 or 24-bit parallel RGB interface.The evaluation kits offer small LCDs below my requirements, and I need to make sure that the MPUs can support what I need.Looking at the datasheet for STM32MP157C MPUs, it is clearly stated in multiple places that the upper pixel resolution limit for the LTDC module is WXGA (1366x768) at 60fps. However:the max pixel clock - LCD_CLK is stated to be 90MHz at specified supply voltage range. At that clock frequency, barring any external memory-related bottlenecks and assuming some small HSYNC/VSYNC + porch timings, I should be able to run a 1280x1024 LCD at around 63 fps max - and for sure at 60fps. Involved memory transfer clocks seem to be fine as well (I could be wrong on this one).LTDC register definitions seem to support much larger width and height values than what I need, so I s
If we emulate the MCU watchdog reset on STM32MP1 it works fine. MCU is got restarted and runs after that. SYSRESETREQ assertion (by calling NVIC_SystemReset) works fine with dedicated M4 processor.We wander what can be a problem on STM32MP1 ?
I am interested in the maximum transmission bandwidth between the A7 core and M4 core on the STM32MP1.I did some test using RPMsg framewirk and sent messages with length 496 Byte from the A7 core to the M4 core. Therefore I modified the OpenAMP_raw example. I measured the time which it takes to receive 2300 messages on the M4 side using HAL_getTick(). I measured an average time of 132 ms, which would result in a transmission bandwidth of just 8,64 MB/s, which seems pretty slow to me.Has anyone made some experience with it or did some similar evaluation? Maybe me measurement method isnt optimal? I am thankful for evey opinion.
I connected an external sensor via i2c and modified the device tree dk2 with following addition:&i2c5 { status = "okay"; clock-frequency = <100000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c5_pins_a>; pinctrl-1 = <&i2c5_pins_sleep_a>; pressure@5c{ compatible = "st,lps22hb-press"; reg = <0x5c>; vdd-supply = <&v3v3>; }; I am able to see the sensor on the correct address in the register but the kernel doesnt seem to recognize it as a st pressure sensor. Its also not shown in the list of iio. I also modified the device tree dk1 like this:&i2c5 { status = "okay"; clock-frequency = <100000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c5_pins_a>; pinctrl-1 = <&i2c5_pins_sleep_a>; }the sensor is the correct one btw.edit:I also checked in the config that ST-sensor-Drivers are activated before building.
I built the rootfs according to the instructions at https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package, but the userspace program of gcnano is not installed in the rootfs, the / vendor directory is empty. I need to manually install gcnano-userland- multi-binary-stm32mp_6.2.4.p4-r0.0_armhf.deb to complete the installation, where is the problem
I used 1GB LPDDR3 at STM32MP157AAA3 chips.but it's only read 512MB:sad_but_relieved_face:
Hello, I am trying to prepare QSPI Flash and eMMC with SD card u-boot on my EV1 board. Is there a document about this?The layout file I am using is FlashLayout_nor-emmc_stm32mp157c-ev1-trusted.tsv:#Opt Id Name Type IP Offset Binary - 0x01 fsbl1-boot Binary none 0x0 tf-a-stm32mp157c-ev1-trusted.stm32 - 0x03 ssbl-boot Binary none 0x0 u-boot-stm32mp157c-ev1-trusted.stm32 P 0x04 fsbl1 Binary nor0 0x00000000 tf-a-stm32mp157c-ev1-trusted.stm32 P 0x05 fsbl2 Binary nor0 0x00040000 tf-a-stm32mp157c-ev1-trusted.stm32 P 0x06 ssbl Binary nor0 0x00080000 u-boot-stm32mp157c-ev1-trusted.stm32 PED 0x20 env Binary nor0 0x00280000 none PE 0x10 empty Binary nor0 0x002C0000 none P 0x21 bootfs System mmc1 0x00080000 st-image-bootfs-openstlinux-weston-stm32mp1.ext4 P 0x22 vendorfs FileSystem mmc1 0x04080000 st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 P 0x23 rootfs FileSystem mmc1 0x05080000 st-image-weston-openstlinux-weston-stm32mp1.ext4 P 0x24 userfs FileSystem mmc1 0x33A80000 st-image-userfs-ope
Hello.Can someone explain problem by this diagnostics:----------------------------------------bootfailedS-00000001C040CFFENS-0000000000000000°----------------------------------------bootfailedS-00000001C040CFFENS-0000000000000000№----------------------------------------My board say these lines to PA13 pin (9600-8N1) after power up.Flash memory contain [may be] properly formed first stage bootloader file with only infinite loop at starting point.Binary in attachment.
Hi There,before I go into detail regarding my question I´d like to give some background infos. I have an application in mind that seems like a perfect fit for the STM32MP1 as it would enable me to merge a device which is currently split onto two separate PCBs into a one single board. What´s different in this application is, that I need to be able to autenticate the integrity of the coprocessor firmware and have a mechanism that allows updating of the fw only if a self-adhesive seal is broken, e.g. by sticking it on top of a dipswitch. So what I´d like to discuss are possible solutions to this whole chain of problems. As far as I understood the documentation and the slides from the hands on workshop, this all has to be implemented into the ssbl (u-boot) as it is the only modifieable piece of software to be run before execution of the coprocessor firmware starts. I could imagine doing something like signing the M4 firmware by means of async crypto and storing the signatue alongside with
Hello,We are currently building a product using a STM32MP157 processor and are facing multiples discrepancies between the Reference Manual and the STM32MP1 Cube Package.STM32CubeMP1 register memory map :https://github.com/STMicroelectronics/STM32CubeMP1/blob/master/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp157axx_ca7.hAs example we've taken the TAMP peripheral register map and noticed that the C structure has 128 BKP register but the documentation states only 32.Another one is the the GPIO structure where the documentation states 1 reserved word betwen BRR and SECR but in the CMSIS file there's 2 word reserved. In the case of the GPIO structure the size goes up to 0x404 bytes (which is out of bounds) It's quite painful to reverse engineer each time and check if the size of the structure is somehow fitting into the allocated space given in the boundary memory map.Usually we consider the prototypes files are less error prone than the documentation,however in this case we experien
Hello, I am trying to boot kernel via TFTP from U-Boot on my DK2 board, after retrieving PXE configuration file successfully, the uImage failed to retrieved. However, I could successfully get uImage file by u-boot tftp command.The steps I am following is https://wiki.st.com/stm32mpu/wiki/How_to_boot_the_kernel_via_TFTP_from_U-Boot#pxelinux.cfg_directory.I have installed tftp servers on my Ubuntu, and the pxelinux.cfg directory, PXE configuration file, uImage, stm32mp157c-dk2.dtb are all under tftp directory./tftpboot |---- mmc0_stm32mp157c-dk2.extlinux | |--------- pxelinux.cfg | |------------ 01-00-80-e1-42-51-72 | |--------- uImage | |--------- stm32mp157c-dk2.dtbmy PXE configuration file is:menu title Select the boot mode DEFAULT sdcard LABEL sdcard KERNEL uImage FDT stm32mp157c-dk2.dtb APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttySTM0,115200The TF-A, u-boot, uImage, dtb file are all released by ST.The following is
Hi, I try to add a new layer and a new machine to the STM32MP1 Distribution Image. i followed the following tutorials tutorials:https://wiki.st.com/stm32mpu/wiki/How_to_create_a_new_open_embedded_layerhttps://wiki.st.com/stm32mpu/wiki/How_to_compile_the_device_tree_with_the_Distribution_PackageHowever, I am still getting the following error:WARNING: st-image-core-1.0-r0 do_populate_lic: Could not copy license file /home/user/workspace/STM32MP1/Distribution-Package/openstlinux-4.19-thud-mp1-19-10-09/layers/meta-st/meta-st-stm32mp-addons/conf/eula/stm32mp1-mymachine to /home/user/workspace/STM32MP1/Distribution-Package/openstlinux-4.19-thud-mp1-19-10-09/build-openstlinuxeglfs-stm32mp1-mymachine/tmp-glibc/work/stm32mp1_mymachine-openstlinux_eglfs-linux-gnueabi/st-image-core/1.0-r0/license-destdir/st-image-core/stm32mp1-mymachine: [Errno 2] No such file or directory: '/home/user/workspace/STM32MP1/Distribution-Package/openstlinux-4.19-thud-mp1-19-10-09/layers/meta-st/meta-st-stm32mp-addons
Hello,Could you explain the reason why Android is not supported on the STM32MP157C-DK2?I can't find any instructions how to install an Android image on the target? The following example references the coprocessor example for A7 and M4 cores, but misses how this is done:-https://wiki.st.com/stm32mpu/wiki/STM32MP1_Developer_Package_for_Android
Hi there, I am working with a customized STM32MP153A board and trying to boot from eMMC.I had prepared my eMMC following the steps that I found in <u-boot-stm32mp-2018.11-r0 source code directory>/board/st/stm32mp1/README file:8. Prepare eMMC===============You can use U-Boot to copy binary in eMMC.In the next example, you need to boot from SDCARD and the images (u-boot-spl.stm32, u-boot.img)are presents on SDCARD (mmc 0) in ext4 partition 4 (bootfs).To boot from SDCard, select BootPinMode = 1 0 1 and reset.Then you update the eMMC with the next U-Boot command :a) prepare GPT on eMMC, example with 2 partitions, bootfs and roots: # setenv emmc_part "name=ssbl,size=2MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512" # gpt write mmc 1 ${emmc_part}b) copy SPL on eMMC on firts boot partition (SPL max size is 256kB, with LBA 512, 0x200) # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32 # mmc dev 1 # mmc partconf 1 1 1 1 # mmc write ${fileaddr} 0 200 #
how do i remove service at the build time,such like avahi-daemon,systemd-timesyncdI don't need them,I hope the system can start as soon as possible by removing unnecessary startup items
For STPMIC1, when it is powered on by asserting the PONKEYn signal low, what would happen if the PONKEYn remains asserted low even after the initial POWER_ON trigger? Would it subsequently trigger a POWER_DOWN if PONKEYn long press turn off is activated? Or is the PONKEYn event triggered only when there is a HIGH to LOW edge transition (edge trigger) ?Thanks.Steven
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