STM32 MCUs

Trying to get MD5 hash acceleration working on the Nucleo-H563Zi. I can get SHA1 hash engine to work via bootstrapping a project via CubeMX, but for some reason MD5 is not a selectable option for the hashing algorithm in CubeMX.  All other algorithms can be configured and work, but MD5 is not an option. The Datasheet for the STM32H562/3 says that the Crypto engine offers a MD5 hash, but I can't seem to configure it via CubeMX or by updating the generated code in hash.c to select the MD5 algorithm within MX_Hash_Init(). Is MD5 not supported on the H5?  There are no MD5 examples in the github example repo despite the datasheet claiming the crypto/hash accelerator supports MD5.

Hello, I have 2 NUCLEO-H563ZI boards connected to each other as required, one running the "I3C_Target_Private_Command_IT" example and the other running the "I3C_Controller_Private_Command_IT", i also have a logic analyzer connected to monitor the I3C communications, however the setup is not working as expected, the "target"  ACKs the initial broadcast from the "controller", but NACKs the subsequent broadcast after the "ENTDAA" CCC Any thoughts on what could be wrong here ? I tried debugging but the "target" board simply does not seem to be observing any interrupts/events during this whole "ENTDAA" CCC transmission from the "controller"

I've got some code running on the C4 in an STM32H747IGT6, it's just waiting for the ADC to have data and then reading it: while (!LL_ADC_IsActiveFlag_EOC(ADC1)) {} __disable_irq(); start_timer = TIM5->CNT; LL_ADC_ClearFlag_EOC(ADC1); adc_data = LL_ADC_REG_ReadConversionData32(ADC1); data = ((float)adc_data) / 65536.0f; // Normalize from 0..0xFFFF (-4 to 4V) to 0..1 end_timer = TIM5->CNT; uint32_t icsr = SCB->ICSR; __enable_irq();With IRQs disabled (as shown here), TIM5->CNT shows the code takes 6-8 ticks but if I comment out the calls to __disable_irq() and __enable_irq(), the code takes as many as 146 ticks and I'm trying to figure out why.  TIM5 has no interrupts enabled and is running at full speed (240 MHz) so ticking once every 4.1666 ns.If I look at the value of SCB->ICSR it's almost always 0x400000 which means ISRPENDING but VECTPENDING is zero.In my code I'm only enabling 3 interrupts and I've verified none of them are firing.How can I figu

We appreciate the example in the STM32Cube repository, located at STM32Cube_FW_H5_V1.1.1\Projects\NUCLEO\H563ZI\Examples\FLASH\FLASH_OBK_EraseProgram. We are looking to modify the product state and write the .obk file directly from the firmware, and we believe your example is a great starting point.STM has detailed a procedure for writing to the alternate OBK sector using the non-secure FLASH_NSOBKCFGR register. The addressing for the OBK sector is set to the base address 0x0BFD0000 (non-secure) rather than 0x0FFD0000 (secure).However, we noticed that the STM32CubeProgrammer employs secure base addressing for the OBK sector, while your example uses non-secure addressing. This difference is essential for our understanding. Could you please explain the reason for using non-secure addressing in your example?According to Figure 32, "Swap Workflow", of the Reference Manual, the role of the current OBK sector and the alternate OBK sector is interchanged after the Swap operation. Thus, w

Moved from MPUs section - STM32L100 is an MCU, not an MPUI compare this my layout board (with outer st-linkv2 connected), and stm32l100c disco.stm32l100c disco does not have such a question. It will show "Error 57: Illegal Address(0x8000000)".And I disable download to flash, this error is disappeared.However, the program runs in 0x1ffffxxxx,not flash (0x8000000). It won't run my codes (no flash could be found?). I could not run my codes after download, either.But I am totally sure these codes could be executed in stm32l100c disco.And help?   

Hello,I plan to use STM32G031Jx in a SO8N package and use embedded bootloader over UART.According AN2606, both USART1 and 2 can be usedBut PA3 is not available on SO8N, so remains only USART1.But USART1 is used by bootloader on PA9,10 which are not directly available on SO8N packages.These pins become available after remap (SYSCFG_CFGR1) which is default 0.Also in AN2606 says thatSo question, how this is working?These devices comes (blanks) having remapping activated from SYSCFG_CFGR1?It means that PA11,12 cannot be used anymore, because if I remap them, I will not be able to enter to bootloader at next reset, right?Thanks for clarifications,   

I've been on an adventure trying to get my first CubeMX/STM32 project off the ground.  Here's as much context as I can give for my debugging process, and hopefully someone can spot what I'm missing. Dev Board: Nucleo-STM32H563ZIT-144 (Arm M33 Core)IDE: VSCode running STM32 V3 (Pre-Release) Toolchain (not using Clang -> using VSCode C/C++ Language Server for Intellisense) on Windows 11Build Tooling: CMake and GCC with code generated from CubeMX using FW/HAL v1.5.0Middlewares Used: ThreadX, NetXDuo, USBX Initial Debugging:First off, the rest of the code base has been working fine, the general ThreadX Application, Netx stack/App, and any additional code I have added hasn't generated unaligned access faults.  I have not been using the MPU, and have explicitly disabled it in the entrypoint using HAL_MPU_Disable() as well as inside Cube MXmain.cint main(void) { /* USER CODE BEGIN 1 */ /* Disable MPU */ HAL_MPU_Disable(); /* USER CODE END

Hello,I use a STM32F103 MCU and I use the RBIT instruction (as an CMSIS inline functinon). The instruction works properly and I can see the rbit instruction in the disassembly window (for this project I have to use an old TrueSTUDIO IDE).According to the ARM documentation this MCU could not execute the RBIT instruction because it is a Cortex-M3 r1p1 core (CPUID: 0x411fc231) which does not have this instruction. In spite of this the instruction seemly works and the "PM0056 Programming manual" (STM32F10xxx/20xxx/21xxx/L1xxxx) mentions too the instruction without making any difference about the revisions.Can someone help clear up this confusion?  

Hi ST,I am trying to understand sensor less speed measurement using STO-PLL observer I did not get any idea for the parameters F1, F2, gain1 and gain2 parameters from user manual (STM32 motor control SDK user manual) and software code too. could you help me to understand how these parameters are computed by workbench by using motor parameters. this will help me lot. Thanks,Rahul D.

Hi guys,I'm coming from Arduino and recently started working on a project where I need a protocol that supports bidirectional communication between MCUs and Hot-Join.I decided to give I3C with the STM32H5 a shot and got myself some Nucleo-H503RB boards.Based on the example projects from ST on GitHub:https://github.com/STMicroelectronics/STM32CubeH5/tree/main/Projects/NUCLEO-H503RBI got these things working:Target sends a Hot-JoinController detects it and assigns a dynamic addressIBI from the target is received on the controllerWhat doesn’t workI can’t get regular data communication working.For example, I want the controller to send a string on a button input like "ping" to the target, and the target should respond with "pong".From my understanding, communication in I3C works something like this:Target to Controller:Target sends IBIController receives IBI and starts listening using HAL_I3C_Ctrl_Receive_IT()Target sends data using HAL_I3C_Tgt_Transmit_IT()Controller receives data in HAL_

Could you please explain why global interrupts are disabled (using __disable_irq()) at the beginning of the LPTIM_Disable() function, and re-enabled at the end?Does this relate to ensuring atomicity during the timer's register save/restore process, preventing potential race conditions during clock source reconfiguration, or avoiding unintended interrupt triggers during the reset sequence?"void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim) { uint32_t tmpclksource = 0; uint32_t tmpIER; uint32_t tmpCFGR; uint32_t tmpCMP; uint32_t tmpARR; uint32_t tmpOR; #if defined(LPTIM_RCR_REP) uint32_t tmpRCR; #endif __disable_irq(); /*********** Save LPTIM Config ***********/ /* Save LPTIM source clock */ switch ((uint32_t)hlptim->Instance) { case LPTIM1_BASE: tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE(); break; #if defined(LPTIM2) case LPTIM2_BASE: tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE(); break; #endif /* LPTIM2 */ default: break; } /* Save LPTIM configuration registers */ tmpIER = hlptim-&gt

Hi ST community,I am developing firmware on the STM32H743 and I store the images and texts in BANK1 of an external Flash memory, specifically the 8MB MX25R6435F. To update my firmware, I write the new images, fonts, and texts to BANK2 (0x90400000) in the external flash and I utilize the swap memory of the STM32H7.Here is my linker script:/* Memories definition */MEMORY{DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128KITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64KRAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512KRAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288KRAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64KFLASH (rx) : ORIGIN = 0x8020000, LENGTH = 896K - 4 /* Last 4 bytes are used to store the CRC */CRC (rx) : ORIGIN = 0x80FFFFC, LENGTH = 4QUADSPI_BANK1 (r) : ORIGIN = 0x90000000, LENGTH = 4MQUADSPI_BANK2 (r) : ORIGIN = 0x90400000, LENGTH = 4M}/* External Flash Section */ExtFlashSection :{*(ExtFlashSection ExtFlashSection.*)*(.gnu.linkonce.r.*). = ALIGN(0x4);} >QUADSPI_BANK1FontFl

For a project of mine, I wanted a LoRa Transceiver like (like the SX1262) to be controlled by a host application running on a STM32F4. I have a few STM32WLE5CCU6s lying around from a previous project, and was thinking if I could use them instead. The SX1262 drivers are written in the host application, so I just need to access the actual transceiver's SPI and other signal lines. I realize that the DEBUG option exposes critical pins like the SPI, NSS, RESET and BUSY. But are the DEBUG lines writeable or are they just for monitoring of signals?

On STM32F4, when you choose PLLCLK as the MCO1 source, does the HAL actually routes the PLL output going into SYSCLK, i.e. after the PLLP division?#include <Arduino.h> #include <RCC.h> void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; __HAL_RCC_PWR_CLK_ENABLE(); RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 25; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 7; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_

Hello there,I cant find full working example about ram initializations and relevant RISAF settings,I need to get at least 2.5MB region for camera data capture, I found clk and power enable functions, but it does not working, when I increase memory size in .ld file the code does not run...I guess I use correct clk and power registers:__HAL_RCC_AXISRAMx_MEM_CLK_ENABLE();RAMCFG_SRAMx_AXI_NS->CR &= ~RAMCFG_CR_SRAMSD;I use FSBL and my code will fit there not reaching 512KB limit.CubeMX do not have a lot of settings there, RISAF do not have default values or some help hints which there can help, and there is no memory map window like let say for H7 and other mcu's...How to correctly initialize and use all the RAM ?Thanks.

Hello, I am using STM32H743BIT6 as a MAC for DP83TC814R Ethernet PHY, I have one query regarding oscillator, I am using Ethernet in RMII slave mode which requires 50MHz reference clock, can i use the same clock which i am using for MCU HSE or should i use different one for EThernet PHY, But how the clocks can be synchronised in that case? 

Hello everyone,  I'm currently working on Ethernet communication between my STM32H563ZI and a TP-Link router. They are connected by Ethernet, and I'm trying to ping the router with my STM32. All is going on, except the DHCP who don't want to connect (I keep the code because my be it can be a solution)  But, when I see the status of icmp_ping, it tells me 0x29 (NX_NOT_SUCCESSFUL). I'v tried a lot of things, changed the Ethernet cable, nothing changed.  Do you have any idea form where it comes ? Here is my app_threadx, app_netxduo and my main code.    /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file app_threadx.c * @author MCD Application Team * @brief ThreadX applicative file ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that

Hello ST Community,I am working with an STM32U5 based board and facing serious issue related to RDP Level 2 and debug access. I am attempting to recover the device using STM32 Programmer CLI and Cube Programmer  but it is not responding as expected even after a successful RDP2 password unlock.$ STM32_Programmer_CLI.exe -c port=swd mode=UR -unlockrdp2 0x18BBDDEF 0x19CCBBEF-------------------------------------------------------------------STM32CubeProgrammer v2.19.0-------------------------------------------------------------------ST-LINK SN : 003200253133510636303739ST-LINK FW : V3J15M7B5S1Board : STLINK-V3SETVoltage : 3.54VError: Unable to get core IDError: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationError: Unable to get core IDST-LINK SN : 003200253133510636303739ST-LINK FW : V3J15M7B5S1Board : STLINK-V3SETVoltage : 3.54VUnlock RDP2 password successfully doneError: ST-LINK error (DEV_TARGET_NOT_HALTED)&n

Hi,I'm trying to move stm32WL to a mode it will consume least power but still be usable for me.I understood this mode is probably STANDBY_MODE with memory retentionI want to do this:1. [Save Stack For Standby] save the stack and any other needed info to the retention area2. set an external clock that will wake the CPU3. go into STANDBY_MODE with memory retention4. when the time comes - the CPU wake and identify in main that we were in standby5. [Recover From Standby] - to get into the main loop, right after the standby functionI some very limited function from ST, and they all seem to do the same,meaning - ignore the RAM retention potential, and starting from scratch.How can I maximize that potential?found no example for this.anyone can help?

HI ST Team,Concerning the GitHub issue https://github.com/STMicroelectronics/STM32CubeWB0/issues/6 In AN5289 – "How to build wireless applications with STM32WB MCUs", Table 1 lists multiple BLE stack options for STM32WB5x devices, including:stm32wb5x_BLE_Stack_full_fw.binstm32wb5x_BLE_Stack_light_fw.binIn the current lib https://github.com/STMicroelectronics/STM32CubeWB0/tree/main/Middlewares/ST/STM32_BLE/stack/lib, only these static libs are present:stm32wb0x_ble_stack.astm32wb0x_ble_stack_controller_only.aThere is no separate stm32wb0x_ble_stack_light.a, which is expected as the lightweight alternative to the full BLE stack.Clarification Request:Can you please confirm if the *_controller_only.a is the intended lightweight replacement for the missing light.a?If yes, can you kindly update the GitHub folder README or documentation to reflect this equivalence (i.e., "controller only.a is functionally similar to the BLE light stack")?If not, can the missing light.a A varian

Hello, I have a problem with SysTick interrupt on STM32L072KZUX.I am using the latest version of STM32CubeIDE + the latest package for my MCU - FW_L0 1.12.3. An absolutely clean project, which was created in IDE and flashed into the device using ST-Link, starts up fine after flashing, but when the SysTick count reaches overflow and an interrupt should be called, for some reason the program goes to the wrong address (PC = 0x1ff00dd0), of course the interrupt handler itself is declared and there is a pointer to the function in the assembler file. Moreover, it does not matter which framework to use: LL or HAL. I checked the vector table both in the firmware image and in the microcontroller memory, all addresses are correct. Moreover, it does not matter how to use it. We checked it on 2 chips from the same batch, a similar program flashed into NUCLEO-L073RZ works correctly. int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration-----------------------

I have USB2 OTG high speed port1 working in "device mode" on the STM32N6570-DK board. I need to transfer an image file (around 10 MBytes in size) from the external PSRAM IC (APS256XXN-OBR-BG Hexadeca‑SPI PSRAM) to external PC via  a bulk CDC IN endpoint. I am able to do this currently without DMA enabled by repeatedly calling CDC_Transmit_HS( ) and waiting for the transmit done interrupt  before sending the next segment. I now want to do this with DMA enabled so that I get one transmit done interrupt instead of one per segment. I only have 3 endpoints (in end point 0, out end point 0 and one bulk in end point). Note that I am not using USBX. When I try enabling DMA in USBD_LL_Init(  ) by setting " hpcd_USB_HS.Init.dma_enable" to "ENABLE", the board does not enumerate. What am I missing ?Thx

Hello STM32 Community,I am working on the STM32F769I-DISCO board and would like to implement UDP communication using LwIP with FreeRTOS.I have already downloaded the STM32F7 series example projects, and I see that the LwIP_HTTP_Server_Socket_RTOS example is available. This project uses FreeRTOS and a TCP socket for HTTP communication. I would like to know how I can modify or use this example project to implement UDP-based communication (sending and receiving UDP packets). or any different way I should use.Could anyone guide me on the steps required to convert or extend this example to support UDP communication over LwIP in FreeRTOS?Any code examples or suggestions would be highly appreciated.Thank you!

Hi. I have a problem while using lwip and freertos. The board is based on stm32h743vih. The mpu configuration is done correctly i think. My problem is after i start udp server and start to send data with udp, everything is ok, but after a while i will enter a loop in xQueueSemaphoreTake an in the configASSERT( pxQueue->uxItemSize == 0 ). I searched a lot and i saw this: https://community.st.com/t5/stm32cubemx-mcus/cubemx-lwip-ethernet-link-thread-bug/m-p/126556 I did what it said but this time when it happens im not in the loop but the other tasks get very slow and actually a task with osdelay(1) is executing every 1 second. What should i do?

I am trying to plot reference speed and measured speed on graph in Motor Pilot. But in graph why measured speed is coming before reference speed? I tried it at different speeds but response coming is same.