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Hello,I'm trying to use the PSSI bus in slave mode to transmit data from a small FPGA. After some time chasing a weird bug (I'm losing 8 32bit words at the end of packet) I decided to use a logic analyzer on the bus and it showed a weird behavior from the stm32.Code configuration:The code is called in a loop with a flag reset in the transfer callback complete:if (((USBD_CDC_HandleTypeDef*) hUsbDeviceHS.pClassData)->TxState == 0) { if(PSSI_RCV_CPLT) { PSSI_RCV_CPLT = 0; if (!buf_sel) { if(HAL_PSSI_Receive_DMA(&hpssi, (uint32_t*)tbuf , 512)!= HAL_OK) { Error_Handler(); } buf_sel = 1; if(CDC_Transmit_HS(abuf, 2048) != USBD_OK) { uint8_t badusbtiming = 1; } } else { if(HAL_PSSI_Receive_DMA(&hpssi, (uint32_t*)abuf , 512)!= HAL_OK) { Error_Handler(); } buf_sel = 0; if(CDC_Transmit_HS(tbuf, 2048) != USBD_OK) { uint8_t badusbtiming = 1; } } } }Reset of the PSSI complete flag.void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi){ PSSI_RCV_CPLT = 1;}At the begins of the first valid

I'm using a DLP-RID2 device to write and read data in a ISO 15693 TAG, in particular i'm using tags based on the ST25TV02KC which have 320 bytes of information arranged in 80 blocks of 4 bytes each.My problem is that with a new factory TAG, i can't read block 50, and read/write operations don't works. Do you have any suggestions for any commands to use to be able to use all 80 blocks?I attach a log that illustrates the commands sent for a readBest regards

Hello, i get this error, ArmClang: error: unable to execute command: Unable to convert command-line to UTF-16: No mapping for the Unicode character exists in the target multi-byte code page. (0x459).Any ideas what it could be? I tried reinstalling the program, changing the utf-8 to utf-16 by notepad, nothing works. File path to project doesn't content any special simbols.

Hi,I have a custom PCB with STUSB4500 as the UCPD controller and STM32H7 as my application processor. Without any I2C communication between stm32h7 and stusb4500 the stusb4500 is able to negotiate a higher voltage from a usbC PD source by matching its preset values. I have checked with a 20V PD source.I am trying to read the capabilities of a USB C PD source as received by the stusb4500 chip. I am using the STSW-STUSB003 software library as a reference to develop my code which is on Zephyr RTOS. I am able to read and write to the stusb4500 over I2C. I have tested the usb_pd_init() and Send_Soft_reset_Message() and they work without any errors. But when I am trying to print the RDO I get the following log: ---- Usb_Port #0: CONNECTION STATUS ---------- - CONTRACT : EXPLICIT - Requested PDO # : 1 - PDO SRC not properly red by the SW - PIN : CC1 - Max Current : 3.00A - Operating Current : 1.50A - Capability Mismatch : 0 - Give back : 0 - USB Com Capable : 0 -

hi, everyone! May you have a nice day! In en.stm32cubeg4_v1-5-0\STM32Cube_FW_G4_V1.5.0\Projects, core_cm4.h file. I encounter the following codes: __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn){  if ((int32_t)(IRQn) >= 0)  {    __COMPILER_BARRIER();    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));    __COMPILER_BARRIER();  }}So the questions are:what's the meaning of __COMPILER_BARRIER();?why it's called here, is ISERx registers related to it?could anyone share some literature on this?thank you for your attention!Best wishes!

So table 54 Vih for 5V tolerant pins is 0.7Vdd. For Vdd 3.3V this is 2.31V.I'm having input capture trigger on signals that only reach 1.8V with 100% consistency on 4 pins.Most stm32f4 the Vih for the same pins is 0.45Vdd + 0.3V, which would be 1.65V, however this is not the case for stm32f401.So what is going on, did the datasheet incorrectly record Vih for f401 or is something else happening?The "something else" I worry about is that the chip I'm testing with is of a batch where this is likely to happen but for the rest of the f401 1.8V is insufficient to trigger input capture. If this is the problem it wouldn't help for me to test with the handful of chips I have laying around since the rest of the f401 could be doing something else.

I am wondering what the logic voltage is for the I/O pins on the STUSB4500L. Under operating conditions they are listed as 0V to 4.5V, but the example circuit shows I2C pullup resistors to 3.3V. Is it safe to connect these I/O pins directly to a 3.3V logic level microcontroller, or will that require a level shifter?

A new batch of electronic board mount an STM32F05R8T6AA170 9UTWN AA 131 marked.All of this devices don't start up LSE clock.The code is the same for about five years and makes the LSE clock start up till this days correctly. The initialization was made using example code bundled with discovery stm32F051.I create with CubeIDE Version: 1.9.0 a minimal setup (CubeMX) for initializa internal RC but the code hangs onwhile(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) { return HAL_TIMEOUT; } }The quartz is the same sice five years and i try to modify the capacitor from 15nF to 6,8nF with no success.Same board with STM32F05R8T6GQ272 9UCHN GQ 944 marked run perfectly.Any ideas?Thanks Fabio

Hello,last year I designed a prototype pcb with a F767, for programming I used the Nucleo-F767's SWD interface (with some jumpers switched), that worked perfectly.Now I need to re-design that board, but with a H723/H733, and I just checked the Nucleo-H723 I've been working with, and I see that the ST-Link part is completely different, mostly SWD connector layout, and no more options with jumpers.For now I would like to keep using the Nucleo-F767 including connector layout, but are there any limitations concerning MCU type or anything else?Specifically, can I program / flash / debug a H723 with a Nucleo-F767's ST-Link?Thanks in advance!

Hi, I have created scatter file: ; ************************************************************* ; *** Scatter-Loading Description File for STM32F4 *** ; ************************************************************* LR_IROM1 0x08004000 0x0007C000 { ; load region size_region ER_IROM1 0x08004000 0x0007C000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) .ANY (+XO) } RW_IRAM1 0x20000000 0x0001C000 { ; RW data .ANY (SRAM) ;.ANY (+RW +ZI) } RW_IRAM2 0x2001C000 0x00004000 { .ANY (SRAM2) ;.ANY (+RW +ZI) } RW_IRAM3 0x10000000 0x00010000 { ; CCM data .ANY (+RW +ZI) .ANY (CCM_DATA) startup_stm32f407xx.o (STACK) startup_stm32f407xx.o (HEAP) } } And added all DMA used buffers to SRAM section: static uint8_t Buffer[BUFFER_SIZE] __attribute__ ((section("SRAM"))); The issue is if SRAM fills with other buffers, some buffers are moved to CCM section as they fall under this category ".ANY (+RW +ZI)". How to exclude SRAM sec

HiI have a self designed board (STM32F44 MCU) with an UART communication. It works well as long as I configure it to use the internal clock. As soon as I switch to the external clock (oscillator), the UART communication gives a noise and frame error after each received byte. The software is the same except the clock config: static void initExternalClock(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HS

Hello together,I'm about to design a pcb for my bachelor thesis with a STM32L010 microprocessor.My goal is to connect my pcb via USB-C connector to my host system to program the microcontroller. The programming should happen via the bootloader and it would be great if there is a possibility to debug/program my microcontroller without any additional devices just like a ESP32 or Arduino board.I researched a lot about it and it seems like programming via the bootloader is enabled "out of the box". But I am not sure about that because I saw a lot of projects with the "blue pill" board and in every project the user had to enable the bootloader with a programming adapter like ST-Link V2. Is there a way or a circuit diagram about the parts I have to use to archive programming and debugging via USB-C?I would appreciate every help or link to a documentation about my questions. The specific stm32l010 documents I looked at are AN4467 and AN2606.Best regards,Claus 

Hi, I am new to this community and working with the STM32 family. I am doing some experiments using the following settings: OS- Mac OS 12.5.1 Board: Nucleo-WL55JC1stlink v3st-flash 1.7.0I am trying to deploy a simple code (blinking LED) on the board using only the terminal. I tried to code on the board before using the cubeIDE and works fine. I used the make command and I have the .elf file, but when I try:   % st-flash write code_application_CM4.elf 0x08000000 st-flash 1.7.0 2023-10-09T14:36:43 INFO usb.c: Unable to match requested speed 1800 kHz, using 1600 kHz 2023-10-09T14:36:43 WARN common.c: unknown chip id! 0x497 Failed to connect to target  I also tried:    % st-util --verbose=99 st-util 2023-10-09T14:37:17 DEBUG common.c: *** looking up stlink version 2023-10-09T14:37:17 DEBUG common.c: st vid = 0x0483 (expect 0x0483) 2023-10-09T14:37:17 DEBUG common.c: stlink pid = 0x374e 2023-10-09T14:37:17 DEBUG common.c

Hello @ all,I'm dealing with a project with stm32H755 MCU, as you know it is made of two cores: cortex-M7 and cortex-M4. Keeping in mind I'm using a few peripherals, among which FDCAN, SPI and most importantly lwIP/ETH, I'm trying to put together all the informations I've found online and tested regarding MPUs. I'm going to underline the fact that there are not many, if any, documents regarding MPUS in dual cores, how they should be set and what rules are to be applied.Let me explain, I suppose that if one of the cores is using a portion of the memory for specific reasons and such area must not be accessed by the other core, I believe i should set the same areas under MPU protection, with access allowed for the core using that memory and without access for the core that won't. Is it correct? On the opposite, should I set only for the core using that memory and the other will "know" automatically not to access that memory area?I have found many references to the MPU focusing on&nbs

Hi,We are using the meta-st-stm32mp layer in out Yocto build system. We have had the system run on the Dunfell distribution up until now with OPTEE as the secure OS.For Dunfell the version of OPTEE is 3.12 along with patches from ST, a we tried to upgrade to Kirkstone which uses OPTEE version 3.16. From what we see the secure storage is no longer compatible with the new version:We get errors like this when using the 3.16 version and the secure storage has been created with 3.12# optee_example_hello_world optee_example_hello_world: TEEC_Opensession failed with code 0xf0100001 origin 0x3We did another test with the official OpenST distribution on a DK2 board fist running Dunfell then upgrading to Kirkstone and we get the same results.We have asked upstream OP-TEE is there is an issue between the versions for backwards compatibility related to secure storage:https://github.com/OP-TEE/optee_os/issues/6296After this we went further and did a test with the upstream version of OP-TEE 3.12 and

Hello, I'm trying to flash my STM32WB15CC using UART1 without using pin BOOT0(PH3). I'm using a NUCLEO-WB15CC. For that I know that I've to set some bits in OPTR register and jump from application code to memory system bootloader and then connect to UART1.I've found how to do it using STM32CubeProgrammer by setting the bits SWBOOT0 = 0, BOOT0 = 0 and BOOT1 = 1.But when I'm trying to jump from application code to the system memory bootloader by setting these bits that doesn't work and I can't find a way to do it. Anybody know how to do that ?This is my code FLASH->OPTKEYR = FLASH_KEY1; FLASH->OPTKEYR = FLASH_KEY2; //Clear OPTLOCK option lock bit CLEAR_BIT(FLASH->CR, FLASH_CR_OPTLOCK_Msk); //Check Flash memory is not busy while ((FLASH->SR & FLASH_SR_BSY) != 0) {} //Write the desired options value in the options registers CLEAR_BIT(FLASH->OPTR, FLASH_OPTR_nSWBOOT0_Msk); CLEAR_BIT(FLASH->OPTR, FLASH_OPTR_nBOOT0_Msk); SET_BIT(FLASH->OPTR, FLASH_OPTR_nBOOT1_

I looked at both the datasheet and Oscillators design document for stm32 controllers. Both suggested the same speed for external Osciallaotrs for stm32F7 controllers that is 4-26 MHz.BUT, in the stm32cubeMx it gives you option to select external HSE upto 50MHz, previous designer used the 50MHz as an HSE and the board is working fine.My question here is what should be the maximum HSE that stm32F7 can support, apparently it can run on 50MHz HSE as well and stm32cubeMX also gives you this option?Regards,Hamza

Hello. I have been dealing with USBx host HID application for a while trying to find a soluction to my problem but despite that I dont know what else to look for to make it work. I'm working with Cube 6.9.2 and with its lastest library STM32Cube_FW_U5_V1.3.0. on a STM32 U575 microcontroller. I do not use USBPD, but I have seen the examples are provided, and in base to that I try to aply ir to my own project not using that specific library. Working with threadx. Clock configuration for USB is correct at 48Mhz, and USB HAL_HCD_IRQHandler is being called if I plug a keyboard.  The problem I have is that no matter what I do, always ends calling "ux_host_error_callback" and logs "UX_DEVICE_ENUMERATION_FAILURE". Any ideas as what to to to solve it are welcome.Thanks

I often use Motor Profiler to identify motors.But it is not good.Sometimes my motor cannot be recognized when using 48V and I have to reduce the supply voltage to 36V.Here I would like to ask whether it will be open sourced. I want to understand the principle of identifying the motor and improve it.

Hi, I have STM32F407VET6 which has such memory layout.Can I join SRAM (0x2000 0000 - 0x2001 BFFF) and SRAM2 (0x2001 C000 - 0x2001 FFFF) memories to one?Or do I must to manage them separately?

Hello Dear Community,I am having a real strange issue while using OSPI peripheral in STM32H7B0 custom board.I am trying to use OSPI with PSRAM but I wanna make sure it works fine, so I am using it with a NOR Flash for test.When I try to activate the MMM using this code, it fails:uint8_tSHIP_XSPI_EnableMemoryMappedMode_RW(void) {/* -------------------------- Enable Memory-Mapped mode------------------------ */OSPI_RegularCmdTypeDef sCommand = {0};OSPI_MemoryMappedTypeDef sMemMappedCfg = {0};sCommand.OperationType = HAL_OSPI_OPTYPE_Read_CFG;sCommand.FlashId = HAL_OSPI_FLASH_ID_1;sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;sCommand.AddressSize = HAL_OSPI_ADDRESS_24_BITS;sCommand.DataMode = HAL_OSPI_DATA_4_LINES;sCommand.Instruction = QUAD_IN_OUT_FAST_READ_CMD;sCommand.AddressMode = HAL_OSPI_ADDRESS_4_LINES;sCommand.DummyCycles = DUMMY_CLOCK_CYCLES_READ_QUAD;sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;if (HAL_OSPI_

Hi,we've been testing STOP2 modes and faced random core2 crashes.We use radio stack 1.15.0 LightCrash data at 0x20030000: 0x1170fd0f   0x00000000   0x00000939   0x2003fa20Any ideas?

Hello, Thank you for any feedback on this issue.i am using the Freertos Heartrate example shipped with the SDK as a starting point.i have noticed that the float type is not getting printed in the debug messages, so i enabled the "use float with printf from newlib-nano" opting in the MCU settings.now i can see that float type numbers are printed correctly but i am no longer able to connect through BLE, it is simply undetectable, even though the debug messages show success on  aci_gap_set_discoverable and the advertisement manager is working properly.Any insights on how to fix this issue are welcome. and have a nice day.

Hello, I recently purchased EVSPIN32F02Q1S1 and attempted to flash it with the FOC firmware generated through MotorControl Workbench 6.1.2. However, I was unable to upload the code onto the board and instead greeted with the following message in CubeIDE:The message was seen when I hit the debug button.I triple-checked the HAL and code generations from MC and CubeMX to ensure the code being debugged had no problem. I believe this is likely to be a hardware issue since I was able to flash other EVSPIN32F02Q1S1 with the same computer. Then I noticed that when I plug in the "faulty" EVSPIN32F02Q1S1, I see this fail text file:I don't recall changing any hardware configurations for the board and I am running out of things to check for.  What could be the problem? 

Hey I am using ST25DV64KC-DISCO discovery board  for my project  where I want NFC enabled mobile to connect with my given mac address and don't want  other NFC  tag writer apps to  writing   on my NFC antenna board   is that possible  with this tag or did you guys have other tags which have better encrypted tags which we can use so that no one can change its memory content like given mac address of the Bluetooth in the tag please suggest