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Associate II
October 6, 2023
Solved

STM32F401 Datasheet Error? Vih

  • October 6, 2023
  • 9 replies
  • 2761 views

So table 54 Vih for 5V tolerant pins is 0.7Vdd. For Vdd 3.3V this is 2.31V.

I'm having input capture trigger on signals that only reach 1.8V with 100% consistency on 4 pins.

Most stm32f4 the Vih for the same pins is 0.45Vdd + 0.3V, which would be 1.65V, however this is not the case for stm32f401.

So what is going on, did the datasheet incorrectly record Vih for f401 or is something else happening?

The "something else" I worry about is that the chip I'm testing with is of a batch where this is likely to happen but for the rest of the f401 1.8V is insufficient to trigger input capture. If this is the problem it wouldn't help for me to test with the handful of chips I have laying around since the rest of the f401 could be doing something else.

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Best answer by Bob S

Those values are a minimum Vih voltage at which the chip is GUARANTEED to detect a "high" input over the specified VCC voltage AND temperature ranges.  It is NOT the minimum voltage that will EVER be detected as a "high" input.  The input MAY detect a 'high" at lower voltages, but that is not guaranteed and depends heavily on voltage, temperature and process variations in chip fab.  Out of spec signal like you are sending may work at room temperature on the chips you have on hand, but might fail to work at higher (or lower) temps or with chips from a different fab or production lot.

9 replies

KDJEM.1
ST Technical Moderator
October 6, 2023

Hello @TonyFauci ,

First let me thank you for posting.

I will check this issue internally and I will get back to you with more details as soon as possible.

Thank you.

Kaouthar.

To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.
KDJEM.1
ST Technical Moderator
October 6, 2023

Hello @TonyFauci ,

These 2 formulas are correct  Vih = 0.7x Vdd is the threshold tested in production and Vih=0.45xVdd+0.3V is the threshold guaranteed by design.

This behavior is mentioned in data sheet figure 30: in blue the threshold level tested in production and in green the threshold level guaranteed by design.

KDJEM1_0-1696595244567.png

Could you please give more details about the test issue:

  • What is the Vdd value?
  • Which IO(s) is (are) impacted with this issue ?

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.
TonyFauciAuthor
Associate II
October 9, 2023

The vdd value is 3.3V, the pins are GPIOA 0,1,2,6.

Bob S
Bob SBest answer
Super User
October 6, 2023

Those values are a minimum Vih voltage at which the chip is GUARANTEED to detect a "high" input over the specified VCC voltage AND temperature ranges.  It is NOT the minimum voltage that will EVER be detected as a "high" input.  The input MAY detect a 'high" at lower voltages, but that is not guaranteed and depends heavily on voltage, temperature and process variations in chip fab.  Out of spec signal like you are sending may work at room temperature on the chips you have on hand, but might fail to work at higher (or lower) temps or with chips from a different fab or production lot.