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I experience a strange problem with I2C, DMA and the latest STM32U575ZI-Q, not seen on L4 and H7 MCUs.After a successful data transfer from SMBus target (slave) to controller (host) the last PEC byte stays in RXDR registry. On the next transfer in the same direction this last PEC byte is read by DMA and placed in the allocated memory buffer as the first received byte. Interestingly, I2C interface does not seem to use this byte calculating PEC CRC so PEC error is not triggered at the end of the second transfer, just bytes in the receive buffer are offset by one. Explicitly reading RXDR register before transfer does not help. This may be a show stopper. I found no workaround and this problem may practically prevent the use of SMBus with DMA on STM32U5.I have not seen this problem on other MPUs, however, they have other I2C issues I have described recently - see: Missing STOP condition problemI2C, Incorrect PEC byte value after RESTART condition - hardwa

I'm having problems getting my software to work with FDCAN2 on the STM32G474e-EVAL board. It works with FDCAN1, but w/ FDCAN2, messages accumulate in the Tx buffer until I get buffer fill errors.I built the FDCAN_Com_IT example from the latest STM32GCube firmware bundle and it fails in the exact same manner. Board is terminated correctly and I believe the CAN pins are wired to each other correctly. What could be going wrong here? Thanks. -es

LSM9DS1 provides 3 orientation registers (ORIENT_CFG_G), but I need Euler angles instead and conversion algorithms require four orientation values. Could you help?

Hi @all,we have an application, where we use the LSE. In due to weaknesses of the part we use, the LSE can fail sometimes.If I then use the __HAL_RCC_BACKUPRESET_FORCE() and __HAL_RCC_BACKUPRESET_RELEASE() to reset the LSE and LSI system, also the SRAM2 section is deleted.I don't understand why.From the reference manual Rev.04 page 481 chapter 11.3.3 Backup domain reset it says: "A backup domain reset affects the LSE oscillator, the RTC, the TAMP, the backup registers, RCC_BDCR, and PWR_BDCR1. The reset of PWR_BDCR1 affects the backup SRAM."The backup SRAM for me is only the BKPSRAM, or not? Also that sentence misses the LSI, if used. The tamper unit is not configured and not used at all. We have a STM32U575CIU6 Rev. X. I also did not found something within the errata sheet. Did I overlook something? Does anyone has a tip for me? Is there a configuration/register/bit I miss which gives the information if the SRAM2 shall be erased with a backup do

I 'm displaying a clock on my STM32F746 disco board and I run into a weird behavior that I can not explain. But I'm new to STM32. I have the RTC initialized to 10 hours, 1 minute and 50 seconds in BCD format. The seconds set to 50 is so I only wait 10s for the display to update after flashing the board. The RTC alarm A is set for every 60s. The alarm A callback function is called which notifies a task to run and update the time which in turn is passed to setTimeDate nTimeDate argument.The view class (shown below) uptades the display. The hours, minutes, AM and PM are textboxes. Hours and minutes have each a wildcard. AM/PM don't have a wild card. The colons between the hours and minutes is a picture.The default value after flashing in the display is 00:00 and both AM and PM are shown. After the 10s the clock shows the correct time (10:02 AM) but after that the PM shows up on every odd minute (see picture). Could someone point out what I'm doing wrong? Thanks. void principalScreenV

Hi,I have a problem with the configuration of PA10 of stm32mp135 to work as pwm of TIM1_CH3. I also make an experiment to disable completely timer and PWM and I also can't control this pin using gpioset. In the documentation I saw that this pin is dedicated to USB "...OTG_HS_ID is on PA10 (EXTI10)". My question is simple how to disconnect PA10 from USB completely? CubeMx doesn't do that.

I experience a strange problem with I2C, DMA and the latest STM32U575ZI-Q, not seen on L4 and H7 MCUs.After a successful data transfer from SMBus target (slave) to controller (host) the last PEC byte stays in RXDR registry. On the next transfer in the same direction this last PEC byte is read by DMA and placed in the allocated memory buffer as the first received byte. Interestingly, I2C interface does not seem to use this byte calculating PEC CRC so PEC error is not triggered at the end of the second transfer, just bytes in the receive buffer are offset by one. Explicitly reading RXDR register before transfer does not help. This may be a show stopper. I found no workaround and this problem may practically prevent the use of SMBus with DMA on STM32U5. I have not seen this problem on other MPUs, however, they have other I2C issues I have described recently - see:  Missing STOP condition problem I2C, Incorrect PEC byte value after RESTART condition - hardware bug su

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Hey guys,I have nucleo and STLINK mini boards that I can upload programs into my custom boards with STM32. But I decided to buy the new STLINK MINIE.When I try to connect some board with STM32 (custom board or nucleo), using STLINK-MINIE, I get this error: "Error: No STM32 target found!". Even with the nucleo board it doesn't work (I removed the CN2 connector from the nucleo board and connected the SWDIO, SWCLK and GND of the MINIE to the arduino header on the nucleo board).Can anyone help me with this problem? We can focus on the nucleo board that we are sure the hardware is ok, I even was able to program the nucleo board using STLINK-V2, only using SWDIO, SWCLK and GND connected to the arduino header, the same way that I have tried with STLINK MINIE, as I said above.In short, I removed the CN2 jumpers from the nucleo board and connected SWDIO, SWCLCK and GND of STLINK-MINIE to the nucleo board and it didn't work. With STLINK-V2 it works.Error with STLINK-MINIE:Thanks

Hi guys,Currently i am trying to get QSPI W25Q512 working correctly with STM32L4R9 but weird thing happened.I am able to write data to the memory but if i start with address 0u i get data somehow shifted by 1u. For example the array of test data start with value 0u and increment by 1u. After writing test array the data in memory starts with 1... If I try to set start address to 1u the data in memory are correct. That means data starts with value 0u.Has anyone faced this problem? Is it only my lack of knowledge? I have uploaded my test (trash) project.Many thanks

Hi, I decided to learn how to create GUIs using TouchGFX and upon creating a project on TouchGFX, 2 questions popped up on my mind:1 - There's no template for the H757i-Eval Board; what would be the right procedure? Is there still some sort of template that I could use?2 - It's a Dual-Core Board, and as far I noticed, TouchGFX also has that Single-Core trend, just like you have when creating a RTOS (ThreadX) Project on CubeIDE, where you kind of have to select a Core for that Reat-Time part.What would be the right procedure here?I searched for the right approach when it comes to this board, but there's nothing on it. It seems like a got the wrong board.Thanks!

SOLVED:  I didn't convert the flashErase_handle.PageAddress to hex, so I was passing in the integer 800_8000, which is much less than 0x800_8000I'm using the Nucleo F303RE board and as part of a bootloader trying to erase pages of flash containing the user application. `HAL_FLASHEx_Erase()` retuns a OK status but when I reset the processor and jumped to the user application it still worked.  I also stepped through HAL_FLASHEx_Erase() to confirm it was trying to erase the right addresses, which it seemed to be as it started at 0x0800_8000 and increase by 0x800 every iteration of FLASH_PageErase().Then I tried `FLASH_PageErase()` manually to erase the first page containing the user application (0x0800_8000) and on reboot the user application did not work.  I also tried manually deleting one of the last pages of flash to see that the user application still worked (0x800F7FF), which it did.  I retested both steps multiple times by reflashing the user application, c

I am using the following slave device for I3C reading and writing. I can now read and write CMOS registers through private mode, but I cannot find any examples of entering and exiting HDR mode. Can you provide an example program for entering and exiting HDR mode? Thanks 

Hello,I have a project with a working implementation of the STL (X-Cube-STL).I recently updated my STM32CubeIDE to version 1.12.0 and everything worked as expected. Now when I open .ioc I get asked if I want to update the .ioc-file to the version 6.8.0.When I do this 2 things happen after saving the .ico file:The \Middlewares-folder (containing the STL, according to the user-manual) is deleted without a warning!The Eclipse project configuration (.cproject) is updated, especially following line is deleted from the build configurations. This breaks the build even when I re-add the Middlewares folder<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Middlewares/ST/STM32_Safety_STL/Src"/>My questions:Am I missing some new options I have to use, so the Middlewares folder is not deleted? I don't understand why my \Middlewares gets deleted, my \Doc-folder not.What is the new expected place for the STL?Thank you!Best regardsMartin

Hello, I have a problem accessing the forum from Mozilla Firefox. The browser constantly refreshes pages cyclically. I tried different PCs from home and work. Firefox is version 114.0.2. 64bit, Windows 10. Browsing is OK when using Edge.

This helps to refer to specific lines in the code.Thanks,-- pa

Hello, I have trouble cannot open apps Touchgfx 4.18.1 Designer in Windows. Any Solution? Thanks you

Hello.I'm trying to make an I3C Master device using the NUCLEO-H503 board.I am trying to implement GPIO by directly controlling, without using HAL Library.However, I3C port uses both Open Drain and Push pull,Is it possible to implement this function with Cube MX?And if possible, is it necessary to modify the circuit such as external pull-up R?

how to reproduce:generate a new C project for Nucleo-G431RB with all default settings.enable TIM1 with internal clock sourceset the prescaler to 170-1set code generation for TIM to LLgenerated code:   /* USER CODE END TIM1_Init 1 */ TIM_InitStruct.Prescaler = 170-LL_TIM_ETR_FILTER_FDIV1_N2;  which is incorrect (and finally killed a motor driver). For HAL code generation, everything looks fine:   /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; htim1.Init.Prescaler = 170-1;  Fun fact: Attaching the .ioc, .zip or .tar failed: The attachment's tim1_bug.tar content type (application/x-tar) does not match its file extension and has been removed. KnarfB

Hi,I'm running an "Ux_Device video" example on NUCLEO H723ZG", but it doesn't work in Uncompressed mode.My setup is:With stream2.h  like source.Can someone help me with the configuration?... Where can I get information about this?Regards

I just want to know about using SPI CS alternate function or a simple GPIO output.  In my design I just have a pin with no SPI CS alternate function available, so could I use it as a simple GPIO output?

Hello everyone,I am working on a custom board based on stm32mp15x. I am trying to periodically wake up my system from the shutdown condition using the RTC. From the hardware point of view, I am using the STPMIC to restore the Vdd supply of the MPU, when the RTC alarm is triggered.I am using an oscilloscope to monitor the VBAT and the Vdd pins, and I can see approximately 1.8V on the VBAT pin when the system is shutdown.Looking around in this forum, I've found similar questions so I tried to patch TF-A to set the PWR_CR2 bits: PWR_CR2_RREN and PWR_CR2_BREN, but unsuccessfully. When I shutdown the system, after the RTC timer expires I obtain: (this makes me think that at least the signals are wired correctly) [ 101.016028] systemd-shutdown[1]: Powering off. [ 101.159164] reboot: Power down INFO: PSCI Power Domain Map: INFO: Domain Node : Level 1, parent_node -1, State ON (0x0) INFO: Domain Node : Level 0, parent_node 0, State ON (0x0) INFO: CPU Node : MPID 0x0, parent_node 0, State

During the first tests, using the suggested combo x-nucleo-nfc05a1 + NucleoL476RG, we noticed something strange: swiping an example NFC tag (see attachment) resulted in a failure, when it seemed to be a classic NTAG213.Digging into the code (X-CUBE-NFC5 library) we found that in the file ndef_t2t.c, line 360-364, if the TLV type field has Lock Control TLV or Memory Control TLV, any NDEF operation for the badge fails. Returning ERR_REQUEST(5).As you can see in the source code, it is explicitly stated that “ /* No support of Lock control or Memory control in this version */ ”.  Then, if we comment out that portion of the code, we can read and write the TAG without problems.Is this a known problem? It looks strange to us that the driver can’t handle this case, while other systems (e.g., ST25 mobile app) have no issues with the same NFC tag.  Maybe the X-CUBE-NFC5 library is not updated?Thank you for your support.Best regards,

I've been trying to get TIM2 PWM (or even OC) to produce an output. When looking at the registers, using openocd w telnet, I find that setting 0x40000000 (the CR1 register) with 0x81 also sets the 0x4000004C (the DMAR) register. The reverse is the same.Here is an example of setting CR1 (offset 0) and having it show up in the DMAR (offset 0x4C)> mdw 0x40000000 320x40000000: 00000081 00000000 00000000 00000000 0000001d 00000000 00006801 000068680x40000020: 00000000 00005658 00000002 00008ca0 00000000 00000000 0000ffff ffffffff0x40000040: 0000ffff 00000000 00000000 00000081 00000000 00000000 00000000 000000000x40000060: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000> mww 0x40000000 0x1345678 [Set CR1]> mdw 0x400000000x40000000: 00000278 [Read-back new setting]> mdw 0x40000000 32 [Look at all the registers; 0ffset 4C now has 0x278!]0x40000000: 00000278 00000000 00000000 00000000 0000001d 00000000 00006801 000068680x40000020: 00000000 0000800d 00000002 0

I am attempting to use a rotary encoder (Bourns PEC11R-4215F-S0024) with an STM32F091 Nucleo board. I would like to have it count a consist number of "counts" for every "click" of the encoder.Hardware Setup: Pin A is connected to PA0, Pin B is connected to PA1 and Pin C (common) is connected to the ground on the nucleo board. This is all done with jumper wires.CubeMX setup: Clock Tree set to have a max frequency of 48MHz using the internal clock. PA1 and PA2 are set to have Pull-Up Resistors, TIM2 is set to Combined Channels = Encoder Mode. All the TIM2 parameters are left at default except for Encoder Mode = Encoder Mode TI1 and TI2, Polarity of both are set to Falling Edge.  I have also activated the TIM2 global interrupt.  I generated the code and added to it so that I could turn the encoder and it would copy the CNT register to a counter variable within a CaptureCallback function.  I have attached my main.c file.I would expect this to add 4 (or subtract 4 depend