STM32L4+ and W25Q QSPI weird problem

[Eiffel]

Hi guys,

Currently i am trying to get QSPI W25Q512 working correctly with STM32L4R9 but weird thing happened.

I am able to write data to the memory but if i start with address 0u i get data somehow shifted by 1u. For example the array of test data start with value 0u and increment by 1u. After writing test array the data in memory starts with 1... If I try to set start address to 1u the data in memory are correct. That means data starts with value 0u.

Has anyone faced this problem? Is it only my lack of knowledge? I have uploaded my test (trash) project.

Many thanks

[Tesla DeLorean]

Perhaps dummy cycles or 3 or 4-byte addressing mode, or the consistency between the MCU and Memory idea of which mode each is using.

I'll skim the code.. 

[KDJEM.1]

Hello @Eiffel ,

Could please check the Errata sheet  ES0393  and precisely 2.8.15 Memory-mapped write data to odd start address corrupted when BUSY = 0 and not in DTR octal‑SPI mode section. 

It is mentioned in the errata sheet ES0393,  when the OCTOSPI is configured in Memory Mapped write data, in all modes except for DTR octal-SPI mode, if the first memory-mapped write operation that is requested while BUSY = 0 is a write to an odd address, the first byte is written correctly, but then this same byte is written to the next address and all subsequent bytes are shifted up one address.

Workaround
Keep the BUSY flag set by using the following method:
1. Disable the timeout counter.
2. Avoid to abort the application.
3. As soon as the OCTOSPI is configured and ready to be used in Memory-mapped mode, perform a dummy read.

Thank you.

Kaouthar

[Eiffel]

So problem was in configuration not in Busy flag. As usually ST help did not help at all.

The problem was in count of dummy cycles between write configuration and read configuration.