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I am trying to create custom sd card image for the stm32mp157f-dk2 board. For device tree I used dts files from basic project created by STM32CubeIDE for that board, for now I didn''t do any changes to device tree. I used latest sources from v.25.08.27 and sdk v.25.06.11 to build kernel, modules and all required loaders.But when I try to flash sd card with created loaders, STM32CubeProgrammer gets stuck on trying to reconnect to the board over USB connection:10:21:44 : STM32CubeProgrammer API v2.20.0 | Linux-64Bits10:22:15 : Read TSV File: /home/ivan/workspace/DeviceTree/FIP_artifacts_MP1/FlashLayout_sdcard_p6_mp1-optee.tsv10:22:15 : Number of partitions: 1310:22:28 : USB speed : High Speed (480MBit/s)10:22:28 : Manuf. ID : STMicroelectronics10:22:28 : Product ID : DFU in HS Mode @Device ID /0x500, @Revision ID /0x000010:22:28 : SN : 00270035313351173534343110:22:28 : DFU protocol: 1.110:22:28 : Board : --10:22:28 : Device ID : 0x050010:22:29 : Start Embedded Flashing service10:22

Hello! I'm working on bringing up a bare-metal STM32MP133C bare-metal on the dev kit from DIGI, using the HAL layer from ST. The problem I'm running in to is we're getting stuck on HAL_ETH_Init as when we enable the MAC clock, DMAMR's 0 bit (the reset bit) is stuck at 1, causing a timeout.  From reading the reference manual, all related clocks need to be enabled for the reset to work, so I'm operating under the assumption there's a clock issue. I've initialized/configured the peripheral clock for PLL4, I'm enabling the relevant GPIO clocks, along with the ethernet clocks ETH1CK, ETH1TX, ETH1RX, and ETH1MAC. This leads me to believe the issue may be with the PHY clock. As we're using the Marvell PHY that comes with the board, I've (attempted) to set it so the PHY uses PLL4 by changing the appropriate bits in syscfg's PMCSETR.  I figured that would be enough to get it all going... but it still seems I'm missing something. I've tried generating the code from CubeMX to

I have recently started a project in VSC using an STM32 device.  I first used STM32CubeMX to generate code, so that created most of the project.  I am using CMAKE.Initially there was no issue, and everything worked fine after disabling intellisense.  However, I have now become plagued by the stubborn red squiggles which refuse to disappear whatever I do.  I would prefer to continue using VSC, but will have to ditch it and move to another IDE if this problem does not go away, as I cannot work like this.  Further down the file there are many other red squiggles.  The project compiles fine, no issues there.  An example of the problem:No matter what I do, the first #include has red squiggles under it.  If I change the order of the #includes, then it is always the first one which has the squiggles.  settings.json file:c_cpp_properties.json file:Any help would be gratefully appreciated, please.

Question moved from this KB. Thank you! It works perfect! While we're on the subject, are there any examples of OpenAmp where both cores enable RTOS? I've been racking my brain for days trying to get them to communicate.

I am working in a project with a STM32WB microcontroller, and I want to print the STM32_WPAN firmware version, but I am unable to programmatically get that info.Any idea about how to know the used version?

Good days at all. I need to start a project and I'm unsure which path to take: I'd like to create an application that requires some tasks to run in parallel and some to run at different times. I've used timers as interrupts in the past, so as soon as a timer reaches its end, I can execute tasks. Now I know I can also use tasks using FreeRTOS, and as I've seen in general, it seems that each declared task has settable delays. My question is this: when working with multiple tasks, is it better to use FreeRTOS or the interrupts of the various timers available? Another question: are the delays that can be set in the cycles within the tasks precise? From what I understand, I believe that both the timer and the FreeRTOS task are non-blocking activities for the processor, which can then perform other tasks without being "blocking." Thanks in advance.

Can we interface the Raspberry Pi camera with the STM32 that has a camera interface feature? 

I am trying to initialise SDRAM on STM32H757I-EVAL.I created a new demo project in STM32CubeIDE using the specified evaluation board. I disabled the other memory peripherals like MMC, etc. It calls MX_FMC_Init() but after that, when looking at memory at 0xD0000000 I only get ????? and accessing it gives hardfault.In this support post it is suggested that the commands must still be sent to controller while in this one it is suggested that BSP_SDRAM_Initialization_Sequence() is called. The latter function is not available in my BSP.How can I create a simple application to initialise the SDRAM?

Hi all, I am working on an STM32H755 project using external QSPI NOR Flash.I intend to use the QSPI Flash in two different ways: 1. Memory-mapped mode for read-only resources (UI assets, fonts, images, etc.)2. Indirect mode for file system operations (writing dynamic parameters) RTOS: RT-Thread (preemptive, priority-based scheduler) My current design is as follows: - All dynamic parameters are read from QSPI Flash at boot and cached in RAM.- During runtime, all parameter access is done from RAM only.- QSPI indirect access (erase/write) is performed only by a dedicated file system thread.- When a write is needed:- The file system thread enters a critical section- QSPI memory-mapped mode is disabled- Flash write/erase is performed in indirect mode- Memory-mapped mode is re-enabled- The thread then exits the critical section and yields CPU The idea is to prevent context switches while memory-mapped mode is disabled, so that no other thread can access QSPI via memory-mapped addresses durin

We have used STM32H743VIT6 in our project. To calculate product life cycle we required below details,MTBFFITUsage temp (°C)Confidence Level (%)Activation energy (eV)Test temp (°C)Test duration (hours)Sample sizeFails 

I am using STM32CubeIDE V1.11.0I have exactly the same issue which was described in this post:https://community.st.com/t5/stm32-mcus-boards-and-hardware/st-link-gdb-server-issues/m-p/64010#M623Multiple weeks everything works fine. But suddenly it stops working and i always get this error message when I try to Debug my code in CubeIDE:Failed to bind to port 61235, error code -1: No errorFailure starting SWV server on TCP port: 61235Failed to bind to port 61234, error code -1: No errorFailure starting GDB server: TCP port 61234 not available.Shutting down...Exit. I tried multiple things:Shuting down PC completely (and disconnect from power supply) and booting again multiple times - it didn't change anythingI changed the Port in the Settings to 61238 - same error message, but with the 61238 port numberI changed the ST-Link Device - same error messageI connected the ST-Link to an other board with an other controller (and selected the appropriate project in cube) but get the same error

Hi, I have stm32l4ri-eval how do i configure the octospi interface to use the issi hyperam which is onboard.

Hello I am having an weird issue and was hoping if someone could provide some guidance. Hardware : Two Stm32 H7 with CAN Transciever Nvidia Orin Can Adapter/Sniffer (Canable) What works :  Stm32H7 to Stm32H7 Nucleo Board Can Bus works. Nviia Orin < - > Canable Adapter Can bus works. Issue : Can bus communication from stm32 H7 to Canable Adapter are not coming through. neither Tx nor Rx. What have i done to troubleshoot Checked wirings for High to High and Low to Low and Tx and Rx as well. Checked voltages for Rx pins at 3.3v( using level shifters wit h transciever) Checked termination resistance and have tested the connections in isolation with both ends terminated with 120ohms ie (stm32- > stm32, Stm32-> adapter, Stm32 -> Orin) I have tested with different baud baud rate like 250, 444, 450, 440, 500k. Tried different Bit Timing Parameters but to no avail. Below are my FDCan Parmeters from ioc file. FDCAN1.AutoRetransmission=ENABLE FDCAN1.CalculateBaudRateNo

Hi guys i have a nucleo h7A3Zi-q dev board . i am trying to receive CAN messges sent from ESP32 borads . esp is sending can  frame by using SN65HVD232D. and i configured the FDCAN to receive the can messages . esp can is set at 500 kbits , and my stm configurations is like this  static void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ FDCAN_ClkCalUnitTypeDef sCcuConfig = {0}; /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = DISABLE; hfdcan1.Init.TransmitPause = DISABLE; hfdcan1.Init.ProtocolException = DISABLE; hfdcan1.Init.NominalPrescaler = 8; hfdcan1.Init.NominalSyncJumpWidth = 1; hfdcan1.Init.NominalTimeSeg1 = 13; hfdcan1.Init.NominalTimeSeg2 = 2; hfdcan1.Init.DataPrescaler = 1; hfdcan1.Init.DataSyncJumpWidth = 1; hfdcan1.Init.Data

Hi everyone,I’m currently trying to bring up an external RAM (HyperRAM over the HyperBus protocol) on the STM32L4R9I-EVAL board. While going through the documentation, I’m finding that information related to OCTOSPI and HyperBus on this family is quite scattered, and it’s been difficult to form a clear picture.From ST forums and discussions, I’ve come across mentions of a silicon/errata limitation on the STM32L4R9 family that affects HyperBus support on OCTOSPI. Some posts even suggest that PSRAM/HyperRAM is not reliably supported despite the presence of the IP, which has left me a bit confused about the actual capabilities and intended use.My goal is to use the external HyperRAM in memory-mapped mode (for example, as a framebuffer). In parallel, the board also has an external NOR flash connected over OCTOSPI (non-HyperBus), for which ST provides example projects. However, in those examples the flash is configured on OCTOSPI2, while the schematics show it connected to OCTOSPI1, which a

Hi,I am experiencing a core freeze issue on STM32H7S3L8 MCU, as described below.UPDATE 1: Most probably Data Cache is the main culprit, closing Data Cache in bootloader solves the problem. Application code Enables Data Cache and we have never observed any freeze errors in application code. Relocating the HASH code changes the behaviour but same error observed for both HW and SW Hash functions so Hash is probably irrelevant! (see the comment section.)In the bootloader, I compute a HASH over the application image stored in external XSPI flash (memory-mapped XIP). After this process, "we believe", the core occasionally freezes and becomes inaccessible through the debug probe.In the first scenario bootloader firmware remains unchanged; only the application binary varies. The freeze depends on the application binary. Some application images consistently trigger the issue on every power cycle, while others run without problems.In the second scenario when using an application image that trigg

Hello, we have device with very old TFT display which is dying. New one is unable to obtain. It has similar interface as DCMI: vsync, hsync, pixclk, D0-D8.I have connected these clock/data lines to DCMI port, but interrupts was not triggered.Here are my clock lines (from top: vsync, hsync, pix):I suspect that timing of clock signals is not correct - compared with image I have found:clock signal is continuous, hsync/vsync falling at the same time... Can somebody confirm this, or can somebody point me to document with detailed dcmi clock format/timing?Thank you.mm

Hello,I can’t download the file en.SOURCES-stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.08.27.tar.gz from https://www.st.com/en/embedded-software/stm32mp1dev.html#get-software. Only this file gets downloaded: SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz.Could you please advise how I can download the correct en.SOURCES?

Hello,I am working on a hobby project with https://www.st.com/en/microcontrollers-microprocessors/stm32f767zi.html.I have my own build and development environment based on arm-gcc-none-eabi and CMake and all HAL Drivers and Libraries from STM.The board starts properly up and I have started to work with GPIOs. Most of my initialization routines are copied from Example Projects. I think, that they are very similar, but I´m not 100% sure yet. While initializing the LEDs, the MCU produces a HardFault (and sometimes a Memory Fault) from within the HAL Code. Currently HardFault occurs very consistently. First I want to take care about the HardFault and if MemFault is still occuring, I want to take care of this as well. The error is thrown exactly at this line:https://github.com/STMicroelectronics/stm32f7xx-hal-driver/blob/e1446fa12ffda80ea1016faf349e45b2047fff12/Src/stm32f7xx_hal_gpio.c#L191 Configurable Fault Status Register has:precise error bit setbfarvalid bit setThe value

Hello,Trying to do precise GPIO pulses with assembly code - on any STM Nucleo board - shows jitter and fluctuating frequency. I was told by a super user to do it via PWMI would like to add some comment that may be interesting for others :- trying to do precise pulses with PWM on the Nucleo H723 for example, still shows jitter and fluctuating frequency around the desire value. Same using HSE or HSI. Same with Nucleo-F411. Same with Nucleo-N667. I understand the reasons now.But playing around the Nucleo-N657, I got some success : if you feed your CPU_clock directly with HSE (48MHz on board), and feed the other peripherals, including timer_clock with HSE+PLL (400MHz for example), then the resulting PWM is quite accurate and stable !Regards,

Hello,I'm using the STM32H723 (at 550MHz) to generate pulses on a GPIO output at a certain frequency (around 4KHz)I'm generating the pulses with assembly code. I've stopped systick and interrupts. However, looking at the signal with a scope, I'm discovering that the frequency is not fixed, moving around the desire frequency. I've tried both with external cristal or internal HSI. Same result.What is the reason ? Is there a possibility to stabilise the output signal ?Thanks for your help,Laurent 

Hello.   I have developed a firmware using FREEROTS and FatFS.   I have setted FREERTOS with : - one thread (osPriorityNormal, 24) that perform massive read on uSD file (100MByte) to search a string (the search takes at least 40secs) - a software timer (priority 2) that, in a certain moment, write a string in certain position in another file.   What I observe is that that FatFS f_lseek API called in software timer returns FS_TIMEOUT when the thread is performing massive read.   I'm tempted to augment FS_TIMEOUT to 100 secs or augment software timer priority to a number greather than 24 (osPriorityNormal) but have you another suggestion ? Is it the right way ?   Thankyou in advance.

Datasheet 4.5 Maximum value for Symbol Vin in Absolute maximum ratings is 0.3 to Vdd_IO +0.3, should it be -0.3 to Vdd_IO +0.3?

We just purchased one STM32U5G9J-DK1 from Digikey. We try to replace the LCD module on it with our own selected display with one MIPI lane. Thus, we are designing a interface board so that it can mate with CN2. And since we are also using a touch screen with I2C interface, we also need to connect CN4 I2C5. In this case, may I have the schematic and BOM of the main board MB1928B so that I can have all the pin definitions and connector model information? Thank you.

Hello Team,I have a new STM32F401RE board along with the ST-Link.I tried installing all the drivers required for the STM32 hardware, but the USB device itself is not getting recognised. Can you please help me resolve this issue?