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Hello,I'm developing a project where we will be using a ST253916 for a reader/writer device (base station) and a ST25DV type 5 tag (battery powered device). The idea is to transmit data from battery device to the base station. It will be hundred of bytes or so (data from sensors). per day. Both devices are pretended to be paired all night (8 hours). It would be better to use Mailbox and store data through Fast Transfer Mode or NDEF messages written to EEPROM memory? Speed is not important in this use case. It should be a bi-directional (half duplex is okay) communication. I am not sure this can be done through standard NFC NDEF messages.Thank you,Dani

There are many guides available online that explain how to set up DMA with ADC. I followed such a guide in version 1.7 and it worked out of the box. Now I'm trying the same thing in version 1.9 and it won't work.The first thing I noticed that the ADC Clock Prescaler setting seems to be no longer a thing.The last time I set it up, I just chose continuous conversion with a prescaler and everything worked. Even without an timer. These were my settings back then: Note here that it is the same MCU on the same board in the same project. I only updated the cubeIDE.I now tried it with a timer (which is preferred anyway) but this still doesn't work. The timer works as can be seen on the oscilloscope here: The yellow line is the timer, the blue line should have a peak triggered in the convCplt interrupt. DMA is set up with a circular buffer.Here is the setup:https://github.com/TimGoll/masterthesis-lcr_driver/blob/main/Core/Code/Threads/AnalogIn.c#L10-L15https://github.com/TimGoll/maste

Hello,After Migrating my STM32H743ZITx project from CubeMX version 6.4.0 to 6.5.0, ADC stopped working (stucks at ADC_Calibration function).Found out that in v6.5.0 ADC Clock settings were removed for some reason.Please see comparison below: Also compared generated adc.c files. All Pheripheral Clock Init settings are missing.  Is it a bug or a feature? How this problem could be solved using the latest CubeMX version.Thanks in advance.

I am facing issue of memory with Stm32L432xx, So i tried option of increase optimization level from -01 to -0s.But observe no change it just reduce in .text section... but it increased in .data segment. ultimately value is same and issue is continueBefore optimization i.e -01 text    data     bss     dec     hex filename  117760        11264        30064        159088        26d70      build/app-firmware.elfAfter optimization level set -0s text    data     bss     dec     hex filename 117480         11544         30064   &nb

Hello, I am working on project where I need to check if field is falling or rising. I have enabled the filed change interrupt in GPO, which works fine to generate the GPO interrupt. Unfortunately both the interrupt flags for field change interrupt i.e. field falling and field rising interrupt flags are set irrespective of whether reader is moved towards the tag or away from the tag. Is this the general case that both the flags are set on field change interrupt? If not then is there any setting which can be used to control the flag being set?Any help would be much appreciated!

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I'm debugging a legacy application on an STM32F407 that uses the std peripheral libraries and LwIP 1.4.1, and except on rare occasions, hardware IPv4 checksums don't work; they all get sent out as zeroes. When I disable hardware checksums in lwipopts.h, I get correct checksums (but at a performance penalty). The application works reliably in all other respects, and we've previously ignored the checksum issue.My development IDE is Keil MDK 5.36.0.0Ethernet link is 100BaseT, fixed IPv4 addressing (no DHCP), with two different PHY chips on different target systems (both systems use the same Ethernet stack code and exhibit the same bug). There are a number of settings that need to be used for this, and after many searches, much reading, and a number of debug sessions, I'm confident I have set them all to the right settings. (I've gone as far as breakpointing the Ethernet transmission when it is about to hand over the Ethernet DMA TX descriptor, and checking the descriptor fields and Ethern

Hi,I am running a system with some STM32WB, one client and some server.Right now i am connecting, pairing and bonding the devices. If i start from a condition where i have all the server not bonded (aci_gap_get_bonded_devices return nothing) and I start the firmware, the client connects, pairs and bonds all the server and all works.If i start from a condition where i have all the server already bonded and I start the firmware, the client connects and rebonds all the server and all works.Instead if i start from a condition where I have some server bonded and others not I have some problems. In particular:If I connects (and pair and bond) before all the not bonded devices and after the bonded devices the system still works.If I connects (and rebond) only one server that was already bonded, all the not bonded server cannot be paired anymore. In particular:I start the firmware, mac address list of the servers is received.the first server is bonded, so i connect it, send a pairing request v

Hello.Is there in way to watch or monitor the registers or receive/transmit buffers in UDE STK when MCU is working? There was a watch or Peripheral Registers windows but nothing similar data received.Would you please help me out with this.​Thanks.​

Hello,I have a general question regarding the linker script generated by STM32CubeIDE.Most of time the STACK and HEAP is placed together into the "same" internal SRAM (see section .user_heap_stack example for demonstration purpose). Note: Yes, there is a chance that region can overlap, but this is something I don't want to discuss here. ._user_heap_stack : {  . = ALIGN(8);  PROVIDE ( end = . );  PROVIDE ( _end = . );  . = . + _Min_Heap_Size;  . = . + _Min_Stack_Size;  . = ALIGN(8); } > RAM_D1I wanted to place some critical data, static variables, etc as well as the STACK pointer into the DTCRAM area. However, the heap is not used so heavily in our application therefore, I would like put it into a slower region e.g. RAM_D2/3. I guess this should be possible , right ?If I do so, I assume I can ge get rid of the  ". = . + _Min_Stack_Size;"- statement in the linker script as the stack is now decoupled f

Hello, I am able to successfully compile X-CUBE-MEMSMIC1 (version 5.6.0), UltrasoundFFT for STM32L4R9ZI-STWIN (STEVAL-STWINKT1) - as Debug .bin file. However, when I run it on the STWINKT1, the host Utility/GUI (UltrasoundFFT.exe) does not run. It is unresponsive when click the START button. Basically, the utility program hangs.Alternatively, I don't have this problem when I use the compiled code from X-CUBE-MEMSMIC1 (version 5.5.0). It works fine.I am wondering if anyone has tested this project (UltrasoundFFT for STWINKT1) using version 5.6.0? The Release Notes for version 5.6.0 says that "now using new GenericFFT library". I am wondering if there is any bug in this library (GenericFFTLibrary) versus the previous one used in version 5.5.0.( I am using STM32CubeIDE version 1.9.0 on MS Windows 10, x64 PC for compiling.)Thanks for any suggestion,

Hi,I tried to generate a new project follow SubGHZ_Phy_PingPong example project which does nothing, to test the stop mode with RTC. When I active the stop mode, the current consumption is around 1mA, which still is far away from the consumption mentioned in the datasheet. (In the stop mode, I already configure all GPIO to Analog no pull mode). How to fix this? Please recommend for me some solution. Thank you.my MCU is STM32WLE5CBU6

I am checking NFC operation using NFC-06A1 and Nucleo-L476RG board and STM32CubeExpansion_NFC6_V1.1.0 software.Implementation contents of demo_polling.c, It was confirmed that general card (NFC-A) and tag (using CE mode) were read at the same time.There is no problem with the recognition speed of CE mode, but the recognition speed of general cards is slow.In the demo operation, the polling cycle of the normal card (NFC-A) is 1 second, and it was confirmed that it is related to the discParam.totalDuration setting.If the discParam.totalDuration value is set to 500, the card recognition cycle becomes faster, but the CE mode operation hardly works.In CE mode, even if the authentication speed is slower than the current one, please inquire about how to speed up the card recognition speed.

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HelloI am using an IIS3DWB mems for continuous acquisition.So I configured it to use fifo and interrupt.But, during transfert, I see INT1 going high, and transfert aborts.See Capture.png.Please find IIS3DWB configuration in Config.c, is it good?Thank you for help

I am using STM32H753 for signal sampling.I have enabled ADC1 and ADC3, both of which are in 16 bits scan mode （4 channels）.Everything worked well until I enabled FMC / LTDC to migrate a UI application.I noticed that most channels of ADC share IOs with FMC / LTDC. This may introduce noise into the ADC input when these peripherals are enabled at the same time.If someone has encountered this problem?

Hello ST community,For a project, we use the STM32MP157F-EV1 where we are trying to implement the secure boot chain. For this, we have to generate a FIP package that contains all required certificates. In the ST wiki two methods are proposed :One using the FipTools and cert_createUsing the TF-A make system to generate the FIP.The second method doesn't work from my side. I have a build error. Here is my modus operandi :Source the STM32MP1 toolchain./opt/st/stm32mp1/3.1-openstlinux-5.10-dunfell-mp1-21-03-31/environment-setup-cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabiGo to the TF-A source directorycd <Developer_Package_directory>/stm32mp1-openstlinux-5.10-dunfell-mp1-21-03-31/sources/arm-ostl-linux-gnueabi/tf-a-stm32mp-2.4.r1-r0/tf-a-stm32mp-2.4.r1 Launch the build of TF-A as specified in the wiki :make ARM_ARCH_MAJOR=7 ARCH=aarch32 PLAT=stm32mp1 \ MBEDTLS_DIR=~/mbedtls \ AARCH32_SP=sp_min \ BL33=../../u-boot-stm32mp-2020.10.r1-r0/deploy/u-boot-nodtb-stm32mp15.bin BL33_CFG=../../u-b

There is very little information on the internet, let alone any example that I could look at. My problem is that freeing a semaphore does not trigger an interrupt. I need this feature to allow one core to notify the other in case a certain condition arises in software during runtime.The code is simple:#define TR_EVENT 16   // Clear all interrupts HSEM->C1ICR = 0xFFFFFFFF; // Reset interrupt status register HSEM->C1ISR = 0; // Reset interrupt mask register HSEM->C1MISR = 0; // Turn on interrupt for TR_EVENT HSEM->C1IER |= (1 << TR_EVENT);    // Lock semaphore TR_EVENT SEM_SET(TR_EVENT); // Unlock semaphore TR_EVENT // ---> should trigger the interrupt: SEM_RESET(TR_EVENT, SEM_CM4);Before entering line 16, the content of the HSEM registers look as follows: After line 16, the content is this: So it appears the resetting of the corresponding semaphore properly sets the interrupt registers, but an actual interrupt does not occur. Anyone have som

Hi there,I am using an STM32WLE and I am trying to reduce my Standby mode current consumption. I am currently drawing around 800nA, while the datasheet says I should be drawing about 450nA. One potential cause of excess current is the LSI running for the IWDG (~100-150nA). I have set up the option byte IWDG_STDBY to freeze the IWDG in Standby mode. Does this option byte disable the IWDG (and therefore the LSI) in Standby mode or just freeze the counter? Some of the IWDG registers in RM0461 say they are reset by Standby mode (KR, RLR, WINR), but not others (SR). The PR register doesn't specify. Does this mean the IWDG continues running through a Standby mode exit? And if so, does it lose the previous set up?Any help or clarification would be greatly appreciated. :smiling_face_with_smiling_eyes: Thanks,Rebecca

I have a hobby project where I'm looking to design a flight controller using the STM32H745 microcontroller. My plan is to use the M4 core for data acquisition while using the M7 for the flight control stuff. I have a custom PCB with sensors connected over SPI, I2C and UART. and I'm trying to setup DMA for all these peripherals. However, safe to say this MCU is a lot more complicated than previous things I've worked with. I've setup DMA for UART and that works fine. But I can't seem to get SPI DMA working at the moment on the M4. I've written a driver using the M7 core without DMA and that works fine but I've been unsuccessful so far on the other chip. I just had a few questions to help me clarify a few things:Are there cache coherence issues when using the M4 core? I know you can workaround this on the M7 core by setting your MPU regions or using SCB_clean and invalidate operations. But I don't see a data cache on the M4 chip. Is there a need to do this?in terms of setting up shared me

Hi STI enabled DISTRO_FEATURES_append = "tpm2" in the file ".../layers/meta-st/meta-st-openstlinux/conf/distro/include/openstlinux.inc" as described in the ST Wiki.When building with "st-image-weston" I get the following error message:ERROR: Nothing RPROVIDES 'packagegroup-security-tpm2' (but /home/stm32mp1/Work/Ecosystem-V2.1.0/201119_DVT/layers/meta-st/meta-st-openstlinux/recipes-st/images/st-image-weston.bb RDEPENDS on or otherwise requires it)NOTE: Runtime target 'packagegroup-security-tpm2' is unbuildable, removing...Missing or unbuildable dependency chain was: ['packagegroup-security-tpm2']ERROR: Required build target 'st-image-weston' has no buildable providers.Missing or unbuildable dependency chain was: ['st-image-weston', 'packagegroup-security-tpm2']"... / layers / meta-st / meta-st-openstlinux / recipes-st / images / st-image-weston.bb" of the contents of the file "$ {@ bb.utils.contains ('COMBINED_FEATURES', ' tpm2','packagegroup-security-tpm2','', d)} \"There seems to be

Hi I am using Atolic TrueStudio and have some global variables. For some reason one variable is simply updating every time I step through the code with the debugger. I am using a STM32L433 processor and have 56k ram free. The variable is a character and located at 0x20001165 . As soon as the the debugger runs it goes into the below code within startup_stml433xx.s . I have the variable in the expressions so I can see its value, and also looked at the memory location. Every time I step through the below (and any part of the program) the variable just increases by 1. I know no other part of the application is being called. I tried increasing the stack, heap just in case. Also, moved the variable to a different memory location, and even changed its name, but still it increases. Anyone any ideas? FillZerobss:   movs   r3, #0   str   r3, [r2], #4LoopFillZerobss:   ldr   r3, = _ebss   cmp&

In my application I am using initialized data in shared memory for the use in a user interface. The memory is in the SRAM2 at 0x30020000. Both cores need to access that same data.This code is placed in the Common directory so that it is picked up during compile time for both CM4 and for CM7 individually. When I look at the memory details after compilation, I get the following for CM4: For the CM7, I get: So in both cases, the address for variable uiDisplayArea is 0x30020960 according to the memory details. Bear in mind that it doesn't matter whether I use optimization -O0 or -O3, the above two snapshots are always the same.In my code I am using the following statement to prepare dumping the memory address of this variable:sprintf(strg, "uiDisplayArea pointer: %p.\r\n", uiDisplayArea);If I compile with no optimization, the result printed is 0x30020960, exactly as expected. However, if I compile with optimization level -03, the CM7 gives me a different address, namely 0x300200b

In my application I am using initialized data in shared memory for the use in a user interface. The memory is in the SRAM2 at 0x30020000. Both cores need to access that data, so I use code of the following form:__attribute__((section(".sram2"))) uiSelDef uiSelItem[4] = { [0] = {"abc", 0.0f, 50, CENTER_CENTER}, [1] = {"def", 0.0f, 100, CENTER_CENTER}, [2] = {"ghi", 0.0f, 200, CENTER_CENTER}, [3] = {"jkl", 0.0f, 500, CENTER_CENTER}, }This code is placed in the Common directory so that it is picked up during compile time for both CM4 and for CM7 individually. Note that the initialization is not static on purpose.Why am I doing this? Roughly speaking, CM7 reacts on user inputs via interrupts (using encoders and switches) and shows updates on a screen based on user selection referring data from the array shown above. The CM7 then requests CM4 via semaphores to react to the user input. The CM4 access that very same array.So far so good. This works very well when I am in debug mode. Howev

Yes, I have tried contacting the local ST sales reps here in Australia - no response.Sorry, I've resisted asking this question for a fair while because I know many have greater need. But I thought I would ask this question just in case there is a secret stash of samples held somewhere to help people keep developing their software/prototypes.I need half a dozen STM32L4 chips, LQFP48 with DFSDM - ie. either the STM32L451, STM32L452 or STM32L462.