Empty STM32L4R5 (with factory default settings) will try peripheral boot through system memory no matter what (bug?). PA9 then becomes output (as USART1_TX). Shall we use a resistor for VBUS?

[Alex_DL8AAU]

Strangely an empty STM32L4R5 will try to boot from system memory and then will try all peripherals turning GPIOs to outputs while trying. Of course this is very dangerous if not taken into account in the design of boards that are to be started with "empty" chips (to be programmed in circuit later).

We saw that that the problem happens for PA9 which is needed for USB_OTG_FS_VBUS but is USART1_TX during system memory boot.

(See Table 3 in RM0432 and Table 124 in AN2606)

Can we use a resistor in series to USB VBUS to limit the current - even if we need OTG functionality?

[waclawek.jan]

Running (system) bootloader upon empty flash is a feature, see AN2606 pattern6 (and I'd guess this is mentioned in respective RM too).

Generally, the bootloaders don't turn pins to output unless there's adequate activity, i.e. in case of UART, unless there's a valid 0x7F on the respective Rx pin. Do you have such activity (on PA10) which could be "misunderstood" by the bootloader for communication?

JW

PS. Please change your usename to a normal nick.

[Alex_DL8AAU]

Hi JW,

need to check if PA9 actually becomes an output or not (I just assumed it did). I saw PB9 and PB14 turning to outputs - that would be SPI2 and CAN1 boot. But maybe you are right and the reason it gets to try SPI2 and CAN1 means it did not try UART1 boot before and thus PA9 is not an output. It is difficult to see on the board as there is no resistor currently.

Regards,

Alexander

[waclawek.jan]

Alexander,

> I saw PB9 and PB14 turning to outputs

Are you sure this was during bootloader action?

I admit it's nowhere written in the documentation, but common sense dictates that pins which have to be turned to output to communicate, in bootloader should turn to to output only when the activation sequence on the respective input of the same peripheral has been received.

Could in your application, while running the bootloader, the SPI2 and CAN1 see such sequence on its respective Rx pins (MOSI, SCK and NSS in case of SPI)?

Jan

[Alex_DL8AAU]

>> I saw PB9 and PB14 turning to outputs

>Are you sure this was during bootloader action?

Fairly sure: I erased the chip. Then nothing was connected on PB9 and PB14 but a MOSFET gate and a 100k pull-down.

Voltage on the gate was 0V if I keep the CPU in reset. As soon as I let it run, I measured 3.3V...

PB14 is part of the SPI2 boot, all the other pins (PB12-PB15) are used as outputs in our design and equipped with high-impedance pull-downs (so would be low if used as input). Maybe the boot code just checks NSS and sees it is "activated" (low)?

PB9 is part of CAN1 boot, PB8 would be the RX input. We use it as I2C_SCL, so there is a pull-up.

Regards,

Alexander