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Mich1
Mich1
Associate III
October 21, 2019
Solved

STM32L4 CRITICAL SECTION

  • October 21, 2019
  • 2 replies
  • 5381 views

I use the following code to create critical section.

Is it correct?

I use the __get_PRIMASK() and __set_PRIMASK(primask_bit) from exemple codes.

Why are they needed?

Why disable is not sufficient?

Must I enable the IRQ after or is it done in the __set_PRIMASK()?

From the CubeMx, exemples with primask_bit = __get_PRIMASK(); and __disable_irq(); these lines are not followed by __enable_irq(), why?

Privilege mode is needed to disable irq, how could I know if it is the case?

primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
 __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
 // my code ....
 __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/

Best regards

Mich

This topic has been closed for replies.
Best answer by Pavel A.

>Why are they needed?

>Why disable is not sufficient?

Because of nested calls. If you call something else and that code also disables interrupts, when it exits it will restore previous state instead of unconditionally enable interrupts.

If the critical section is short (as it should be) and you're sure that interrupts are enabled on entry, you can just call enable_irq.

--pa

2 replies

Pavel A.
Pavel A.Best answer
October 21, 2019

>Why are they needed?

>Why disable is not sufficient?

Because of nested calls. If you call something else and that code also disables interrupts, when it exits it will restore previous state instead of unconditionally enable interrupts.

If the critical section is short (as it should be) and you're sure that interrupts are enabled on entry, you can just call enable_irq.

--pa

Mich1
Mich1Author
Associate III
October 22, 2019

is it always true if this part of code is only used outside the interrupts to manage volatile variables written outside and inside interrupts.

What's more int he CubeMx code I can read: for __disable_irq(void):

/**

 \brief  Disable IRQ Interrupts

 \details Disables IRQ interrupts by setting the I-bit in the CPSR.

          Can only be executed in Privileged modes.

 */

I do not see the CPSR in the Cortex-M4 programming manual, is there an other name in this document? Otherwise where is the I-bit?

In the document there is the Priority mask register which contains only 1 bit :

"The PRIMASK register prevents the activation of all exceptions with configurable priority" => it seems to disable all interrupts isn't it?

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