Posted on November 06, 2015 at 18:50I tried to setup STM32F107 I2S for 48Khz -MCLK enabled using STM32CUBE.
RCC is set to 72Mhz via HSE (X-tal).
I2S clock is fed through it's PLL (i2SPLL) instead of SYSCLK, and set to 96Mhz (also tried diffferent values).
But, it gives error of : ''with this i2s clock freq (36.0 mhz). and these settings. the divider value (1) is too low to obtain the desired audio freq. The i2s freq should be higher than (43.008mhz) to obtainthe desired 48 khz''
Update : I forced i2s_div to be 2 ,and i2s_odd =0, but still the produced sound is too slow.
On stm32F4 I didn't get any error, as the Freq is pretty high ...
Does it a bug on STM32Cube or do I need to set it up differently?7
Thank you
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Solved !
For some reasons, Cube genererate PLL_Mul2 instead of MUL9,
So when I manuallly changed PLL_MUL2 to 9 it worked !
Thanks anyway!
