HardFault IMPRECISERR

domen2 · ‎2008-12-09

Posted on December 10, 2008 at 07:42

domen2 · ‎2011-05-17

Posted on May 17, 2011 at 12:55

Hello,

Occasionally I'm getting this hard fault exception (seems to happen randomly), and I can't figure out what is wrong. Register dump from a simple handler:

r0-r3:20000a24 00000001 00000001 14f10001 r12:20000a24 lr:00000008 pc:080018fe psr:81000000

CFSR:00000400 HFSR:40000000 DFSR:0000000a MMAR:e000ed34 BFAR:e000ed38 AFSR:00000000

CFSR flags: IMPRECISERR

HFSR flags: FORCED

DFSR flags: VCATCH | BKPT

What could be wrong? How can I debug it?

16-32micros · ‎2011-05-17

Posted on May 17, 2011 at 12:55

Hi Domen,

Could you describe what does your program ? and on which Product it is running ? Is the problem completely random ( You get this fault each 1minute, second or hours ) ?

According to Cortex-M3 Manuals and the Book of Joseph Yiu, This fault is caused by a Bus error during data access and could be caused by a device not having been initialized, or the transfer size is incorrect for the specific device.

STOne-32.

domen2 · ‎2011-05-17

Posted on May 17, 2011 at 12:55

A program is FreeRTOS with a task and interrupt handler that receive data via SPI interface.

Hardware is STM32 Primer (STM32F103 cpu).

It seems completely random to me. It usually takes a few minutes.

16-32micros · ‎2011-05-17

Posted on May 17, 2011 at 12:55

Hi,

Check that you are using the latest FreeRTOS build for STM32 and Cortex-M3,

athttp://www.freertos.org/ I think that there is some earlier versions not stable. Hope this helps you.

Cheers,

ST1.

[ This message was edited by: STOne-32 on 08-12-2008 15:30 ]

domen2 · ‎2011-05-17

Posted on May 17, 2011 at 12:55

I'm using latest versions.

It seems problem was in my (wrong!) xPortPendSVHandler handler, which was in C, but transferred control to FreeRTOS' asm one. Looks like some registers got corrupted occasionally.

Sorry for the noise.

I still wonder how exactly could I reproduce IMPRECISERR intentionally.

joseph239955 · ‎2011-05-17

Posted on May 17, 2011 at 12:55

You can trigger a imprecise bus fault by a write to a memory location that is defined as bufferable and is invalid. In this case, the write operation is buffered by the write buffer inside the processor, and then the bus system return an error response. By that time the processor would have started execute the next instruction, result in the fault being imprecise.