Confusing STM32F2xx manual for INEPTXFD

dimax · ‎2016-10-23

Posted on October 23, 2016 at 14:55

Hi.

I'm looking at following register in manual: OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXFx) (x = 1..3, where x is the FIFO_number) It has two parts: Bits 31:16 INEPTXFD: IN endpoint TxFIFO depth

This value is in terms of 32-bit words.

Minimum value is 16 The power-on reset value of this register is specified as the largest IN endpoint FIFO number depth. Bits 15:0 INEPTXSA: IN endpoint FIFOx transmit RAM start address This field contains the memory start address for IN endpoint transmit FIFOx. The address must be aligned with a 32-bit memory location. ---- At the same time looking at the samples I can see following code:

 /* EP0 TX*/
 nptxfifosize.b.depth = TX0_FIFO_FS_SIZE;
 nptxfifosize.b.startaddr = RX_FIFO_FS_SIZE;
 USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF0_HNPTXFSIZ, nptxfifosize.d32 );


 /* EP1 TX*/
 txfifosize.b.startaddr = nptxfifosize.b.startaddr + nptxfifosize.b.depth;
 txfifosize.b.depth = TX1_FIFO_FS_SIZE;
 USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[0], txfifosize.d32 );


 /* EP2 TX*/
 txfifosize.b.startaddr += txfifosize.b.depth;
 txfifosize.b.depth = TX2_FIFO_FS_SIZE;
 USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[1], txfifosize.d32 );


 /* EP3 TX*/
 txfifosize.b.startaddr += txfifosize.b.depth;
 txfifosize.b.depth = TX3_FIFO_FS_SIZE;
 USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[2], txfifosize.d32 );

It does not look like values inINEPTXFD are divided by 4 to be in

in terms of 32-bit words

So where is the truth? I need 128 bytes FIFO depth. Should I write intoINEPTXFD value of 128 or 128/4 ?

dimax · ‎2016-10-24

Posted on October 24, 2016 at 13:00

Hi,

Any chance to get a reply in timely manner? Our development is stuck due to this definite mistake in documentation or in sample code.

slimen · ‎2016-10-25

Posted on October 25, 2016 at 12:14

Hello,

Could you precise in which library version have you found this issue?

Regards

waclawek.jan · ‎2016-10-25

Posted on October 25, 2016 at 12:28

It does not matter - the request was for clarification of the datasheet.

(Btw. a quick review shows this is from the USB Host and Device Library which came in the SPL times, but Cube employs the very same mechanism).

JW

Walid FTITI_O · ‎2016-10-25

Posted on October 25, 2016 at 12:39

Hi xol.xol,

I confirm that INEPTXSA field is also defined in term of 32-bit words.

In you case , it will be 128/4

A note will be added in RM to mention that.

Thanks for the feedback,

-Hannibal-

waclawek.jan · ‎2016-10-25

Posted on October 25, 2016 at 13:05

Hannibal,

Thanks for the quick answer.

Just to make things absolutely clear:

The confusing thing is NOT that INEPTXFD is in 32-bit words. That's already written in RM and it's OK. You should add explanatory comment to the libraries (I doubt you are willing to add anything to the USB Device And Host Library which came with SPL; in Cube, it's the calls of HAL_PCD_SetTxFiFo()/HAL_PCDEx_SetTxFiFo() in usbd_conf.c of all the projects with USB).

But what's really confusing is, that the text for INEPTXSA:

This field contains the memory start address for IN endpoint transmit FIFOx. The address must be aligned with a 32-bit memory location.

appears to suggest that it is a *byte* address (whereas it apparently is also a *word* address, or, even better, a *word offset*, i.e. the address of the start of the buffer allocated for given Tx endpoint within the internal 32-bit, given - in accord to INEPTXFD - in terms of 32-bit words). I suggest to *replace* the The address must be aligned with a 32-bit memory location for The address is given in terms of 32-bit words.

Please, don't forget to add this remark to ALL registers regarding USB FIFO (4 instances per USB, if I counted it right), and to RM of ALL STM32 models using the Synopsys USB IP, and in case the given STM32 model has two USBs (which usually have separate chapters), don't forget to do all these changes in BOTH chapters. I promise I *will* check for *all* these, when a new RM appears... 😉

I went through docs for several chips which have similar Synopsys USB IP and this rather dumb formulation is found in all of them, apparently a copy/paste from Synopsys' doc (to give credit, ST is one of the few who removed the - for users even more confusing - template text regarding the IP's configuration options).

A sidenote, the indicated default in RM is also incorrect, as the address increments with x. This should be corrected, too, once at it.

Thanks,

Jan

dimax · ‎2016-10-26

Posted on October 26, 2016 at 18:06

Just to make sure I've got it right, Both INEPTXFD (fifo depth) and INEPTXSA (start address) are in terms of 32 bit words ?

And this is correct for all USB FIFO related registers like RX FIFO and EP0 ?

waclawek.jan · ‎2018-08-25

Yes.

And, needless to say, it's still not corrected (checked RM0090 rev.17) after 2 years.

JW