Posted on November 16, 2017 at 00:12It is by no means a stupid question. The documentation is quite unclear and seems to use ODR as 1) a set of 4 bits ODR0-3 refer to CTRL_REG1 (20h) section 8, which can have values of 0 to 9 OR as a number between 0 and 5376. You never get a divide by 0 (because there are no transitions to power down state listed.
Because the power up Turn On times (table 11) also list this N/ODR math, can we assume the ODR is the rate of the end state (rather than the current state)? This doesn't matter if we use the bits, but if we use the Hz, it matters.
On the other hand, elsewhere in the same document, the ODR is referred to as the sample rate, which is expressed (as you have done) in Hz.
There is an application note: AN3308, which does go into more detail. In section 4.3.1 it says that the effect of the HPF bit depends upon the ODR, but then the listed variations are in Hz, not the ODR bit value.
Section 6.1 of AN3308 does use the same N/ODR arithmetic used in the transition time, and here there is an example and in that example they appear to use the actual Hz as the ODR value. This applies to duration but perhaps we can assume that the other N/ODR values mean the same thing. In any case they consider the ODR to be a value of 1 to 5376 (which means the ODR is measured in HZ). This would mean the transition times are very short (sub microsecond in some cases) which doesn't make much sense in light of the 1.6ms time to start in normal mode listed in section 3.2.1 of the data sheet .
So... maybe we just use the longest time, and then it will work. If we are running at 1Hz with ODR bits of 0x1, and we transition from 12-bit mode to 8 bit mode, we have 1 ms with both calculations (1 Hz and ODR Bits are 1). If we are running at 12bit with ODR bits of 0x9, then the transition time is either 1/9th of a millisecond (112us). or 1/1344th of a millisecond (0.75us) which seems pretty fast (the M in MEMS is mechanical!).
In any case, for my application I am going to assume that the longest timing is 7/ODR Bits (which is between 7ms and 7/9ths of a millisecond). But it sure would be nice if I could use this correctly, instead of guessing.
None of this is made any clearer by section 2.3 of the data sheet which seeks to clarify the math by refering the reader to table 25. Which unfortunately has nothing at all to do with the matter.
How about someone at ST doing the math. The whole thing would become clear if we knew one number:
What is the Turn-on time for operating mode transition from 12-bit to 8-bit with the ODR set to 9 to start (in this case the frequency is 1344Hz to start and ends at 5376Hz. So if we knew that one time in in milliseconds we could back into the answer for all of them.
Alternatively maybe we could get an answer on what do we plug into ODR in the calculation 7/ODR? Is ODR 0-9? Or is ODR 0 - 5376? And in the latter case is the value the 'end state value' or the the starting state value of the ODR?
