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OverviewIn traditional STM32 development, we typically use STM32CubeMX to configure the USART peripheral and redirect printf() to the serial port for debugging output. With the STM32C5 series, ST introduces the new STM32CubeMX2 configuration tool and the HAL2 driver framework. Compared with the legacy HAL, the project structure and some API names have changed, so the UART configuration process and application code require slight modifications accordingly. Hardware PreparationFirst, prepare a development board. In this tutorial, I use a custom-designed development board. If you are interested in obtaining one, you can apply for a sample.The main controller is the STM32C542CCT6. Reference ProjectThe reference project is available on GitHub:https://github.com/CoreMaker-lab/STM32C542_SENSOR Creating a Project with STM32CubeMX2Use STM32CubeMX2 to generate the example project. The MCU used in this tutorial is the STM32C542CCT6. Open STM32CubeMX2 and go to the Home page. Click MCU to creat
When setting high pass filter mode to HPM=01, the values in the reference registers (3Ah-3Fh) need different scaling compared to the data output registers (28h-2Dh). I am following the algorithm specified on p.18 of AN4662 using the following C code:void accel_set_reference(void){ int16_t xyz[3]; lis2hh12_acceleration_raw_get(accel1, xyz); // extra dummy read lis2hh12_acceleration_raw_get(accel1, xyz); xyz[0] /= 8; xyz[1] /= 8; xyz[2] /= 8; lis2hh12_xl_filter_reference_set(accel1, xyz); lis2hh12_xl_filter_hp_bandwidth_set(accel1, LIS2HH12_HP_ODR_DIV_50_REF_MD); lis2hh12_xl_filter_out_path_set(accel1, LIS2HH12_FILT_HP);}For some reason, I need to divide the raw acceleration values by 8 before setting them as the reference values. Observe the graphs of acceleration data I obtain (the step change occurs when this function is called). First, without scaling down by 8:Now when scaling down by 8:Why is this scaling necessary? It is not documented anywhere (as far
Hello Team, We are using a custom board based on QCS8550 processor with LE r90 release. This release has lsm6dsv driver available as part of the ssc framework of the qualcomm. Our custom board includes two LSM6DSVTR IMU sensors which are interfaced over SSC (sensor core based) I2Cs and we are able to get the data through see_workhorse (i.e. qualcomm's userspace utility for sensors) Use Case Requirements: There is a requirement from client regarding sampling the data from IMU sensors on the edge of the reference signal which needs to be provided on the INT2 pin of the LSM6DSVTR sensors. Same reference signal also work as sync signal for the camera as well. so we can consider like sampling the data of IMU and capturing the frame over camera should be somewhat simultaneously. Current Status:In the current driver implementation located at:source/adsp_proc/ssc_drivers/lsm6dsvFrom the driver code analysis, we observed that data is currently being received using a FIFO-based mechanism.Additio
In TouchGFX/target/generated/OSWrappers.cpp at row 38 & 39 the lines : static TX_SEMAPHORE frame_buffer_sem = { 0 };static TX_QUEUE vsync_q = { 0 };will produce a GCC compiler error when the compiler settings are set at -Werror. error: missing initializer for member 'TX_SEMAPHORE_STRUCT::tx_semaphore_name' [-Werror=missing-field-initializers]Compiled with these relevant flagsarm-none-eabi-g++ "../TouchGFX/target/generated/OSWrappers.cpp" -mcpu=cortex-m7 -std=gnu++17 -g3 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -Wextra -Werror
Product: STM32CubeMX2 (.ioc2)Version: generic Linux 1.1.0Appeared with MCU: STM32C542CCU6HAL package: stm32c5xx_hal_drivers 2.1.0Project type: CMSIS-Toolbox / CMake generationSummary:On STM32C5, four ADC1 external channels (IN2, IN5, IN6, IN7) have an alternate GPIO pad selectable via the SBS_PMCR pin-remap bits (ADC1_IN2_REMAP -> PC4, IN5_REMAP -> PC5, IN6_REMAP -> PB0, IN7_REMAP -> PB1 on STM32C542). CubeMX2's pin configurator lets you assign the remapped pad in the graphical pinout, accepts it, and generates both the GPIO analog-mode config for that pad and the ADC channel/sequencer configuration for the channel. However, it never emits the corresponding SBS_PMCR remap-enable write. The generated firmware therefore samples the default (non-remapped) pad, while the pin the schematic actually uses is left unread.There is no generation warning, no build error, and no runtime fault. The ADC returns a stable, plausible, but wrong 12-bit code. Reproduction:1. Assign ADC1_IN7 t
We are designing an independent current monitoring circuit for a motor driven by the powerSTEP01. We are using a 0.1 ohm low-side sense resistor (RSENSE).When probing the voltage across this sense resistor with an oscilloscope, we are observing a distinct PWM waveform where the negative voltage pulses have almost the exact same amplitude as the positive voltage pulses (flipping symmetrically below ground, e.g., +0.5V and -0.5V. )Screenshot: RSENSE voltage generated across 0.1ohm when motor is rotating in current mode Before I modify my external analog front-end (currently using an RC filter, a clamp diode and an op-amp) to handle these negative swings, I want to double-check my findings.Is this symmetrical negative voltage pulse an expected physical phenomenon of the powerSTEP01 H-bridge operating in Fast Decay / synchronous rectification mode? Or am I likely dealing with an oscilloscope probing/grounding issue, such as ground bounce or parasitic inductance artifacts?Any insights into
while programming the stm32h753ZI board via uart through stm32 programmer ide im getting this error , "Error: Activating device: KO. Please, verify the boot modeconfiguration and check the serial port configuration.Reset your device then try again ..." but ive looked into the memory bootmode config and connected the boot0 pin to 3v3 (pin 5-7 in CN11) if there is any suggetions to solve this please let me know.
I am working with an STM32H743VIT6 and I am trying to migrate an existing bare-metal LVGL + SDMMC + FatFs project to FreeRTOS + LVGL + SDMMC + FatFsIn my previous bare-metal project, the SD card worked correctly.However, after creating a new project using STM32CubeMX with FreeRTOS + SDMMC + FatFs, the FatFs mount operation fails from the beginning.The problem occurs when calling:f_mount(&SDFatFS, SDPath, 1);void LVGL_Task(void *argument) { (void)argument; printf("LVGL Task START\r\n"); FRESULT fres; printf("before f_mount\r\n"); fres = f_mount(&SDFatFS, (TCHAR const *)SDPath, 1); printf("after f_mount, result = %d\r\n", fres); if (fres == FR_OK) { printf("SD success\r\n"); } else { printf("SD fail\r\n"); } printf("before ui_init\r\n"); ui_init(); printf("after ui_init\r\n"); while (1) { uint32_t delay = lv_timer_handler(); if (delay > 1000) delay = 10; osDelay(delay); }} I have placed the buf address in AXI SRAM and confirmed that the addres
HiI recently received a NUCLEO-WB55RG (the big board, not the USB dongle) and tried installing the demo from the STM32CubeWB repository.I saw that I need to flash the FUS + Stack first which I did. STM32CubeProg reports FUS State: FUS_IDLEFUS Status: FUS_NO_ERRORFUS Version: V2.2.0.0STACK Version: V1.24.0.3STACK Address: 0x80D0000FUS Operator: v3.1.0The files I flashed were:STM32CubeWB-master\Projects\STM32WB_Copro_Wireless_Binaries\STM32WB5x\stm32wb5x_BLE_Stack_full_fw.binSTM32CubeWB-master\Projects\STM32WB_Copro_Wireless_Binaries\STM32WB5x\stm32wb5x_FUS_fw.binAs application I chose the p2pServer applicationSTM32CubeWB-master\Projects\P-NUCLEO-WB55.Nucleo\Applications\BLE\BLE_p2pServer\Binary\BLE_p2pServer_reference.hexWhen I disconnect the SWD Interface and press the reset button I get the following output (nothing else):Wireless Firmware version 1.24.0 Wireless Firmware build 3 FUS version 2.2.0 >>== SHCI_SUB_EVT_CODE_READY >>== SHCI_SUB_EVT_CODE_READY - FUS_FW
Currently we are developing an AI Industrial camera using STM32N6570, we are exploring the compatible SPI Flash for the implementation. Could you share your recomendation of 1Gb Octal SPI Flash.
Hello,I have encountered a critical issue regarding the USB OTG peripheral FIFO allocation during the static initialization phase (before calling HAL_PCD_Start() ).The Issue:If I resize the Rx/Tx FIFOs twice with the sequence of "Large Size first, then Small Size", the Endpoint 0 (EP0 IN) completely fails to transmit any data (it freezes/stalls) after the hardware starts.Scenario A (Works perfectly): Set Rx FIFO to 0x100 (Words) ➡️ Set Tx FIFO 0 to 0x16. (Single configuration works). Scenario B (Fails completely): First call: Set Rx FIFO to 0x100, Tx FIFO 0 to 0x16. Second call (immediately after): Set Rx FIFO to 0x25, Tx FIFO 0 to 0x16.Result: EP0 IN never transmits any packet afterward.My ultimate goal is to dynamically reconfigure and shrink the FIFO layout at runtime when receiving the SET_CONFIGURATION request from the host, allowing the device to adapt to different configurations
I recently download and installed the latest version of STMCube Programmer and I see that the Signing Tool is now gone. In its place is the STM32 Trusted Package Creator. Unfortunately, support for the STM32N6 appears to be missing. Where may I find the old signing tool?
Hello,I am using an NUCLEO-N657X0-Q (STM32N657) and developing an application using the FSBL + XIP application structure. Development EnvironmentSTM32CubeIDE: 2.2.0 STM32CubeMX: 6.18.1 STM32CubeProgrammer: 2.22.0 The application is stored in external Flash and executed in XIP mode. I can successfully program the external Flash and enter/run the Appli project through the debugger.The application works normally as long as I do not enable the timer update interrupt.However, when I enable a TIM update interrupt in the Appli project, the application stops working when the interrupt occurs.My project structure is:FSBL └─ Initializes the external Flash and starts the XIP applicationAppli └─ Executed from external Flash └─ TIM update interrupt enabled hereThe timer itself is initialized in the Appli project.The interrupt handler is also located in the Appli project's stm32n6xx_it.c:extern TIM_HandleTypeDef htim1;void TIM1_UP_IRQHandler(void){ HAL_TIM_IRQHandler(&htim1);}and the call
Hi,We have configured PB11 and PC4 for UART. when UART send data, what is pin current sourcing capacity?/Anurag
I want to make the CustomScrollTimeTextCenter fully visible, without being cut off by anything else, and without leaving any extra gaps.But it's this kind of effect, I've tried adjusting all sorts of parameters, and I still can't get the effect I want.I want this kind of effect:Here's an introduction to the problem:I have two custom components of different heightsCustomScrollTimeTextCenter 70CustomScrollTimeText 44
Hello everyone,I’m trying to develop a new project using an STM32C552RET6 with a TFT display.I’d like to use TouchGFX for this, but I can’t find any instructions in CubeMX2 on how to configure a project as a graphical application.I saw some examples in TouchGFX Designer using the STM32C5, but I got the impression that the integration was done manually.So, does anyone know if CubeMX2 has this functionality?Thanks,Matheus
Hi Sir,We plan to extend an existing project into a new one. One of the components is the ESDZV054-1BF4, but we haven't found the corresponding datasheet. Could you provide it?
Hi STMicroelectronics Team,My name is Tanet Suksang as Product component engineer. I am interested in your product TS3312AMR , The TS33 family of low power series voltage references. Does product has automotive grade ? or any part number with AEC-Q100 qualified. Thank you.
I am using open bootloader in stm32g0b1kct6 and when i am flashing it and then flashing application code over CAN it is only working while debugging and as soon as i flash application code it stopped working. Both are working fine in debugging but not when hex flashed and also when bootloader is working in debugging and i flash application code it stopped working immediately.
Hi All!I have successfully run ptp4l as a GM role on the 157d-dk1 kit, using NMEA+GPS in as a reference time. I have a specific setup, where NTP is actually disciplining the system clock and the PHC clock is driven from the CLOCK_REALTIME using phc2sys.I wanted to test the PPS output generation on the PG8 pin, so that I can compare incoming PPS with generated PPS, but I can’t make it work.The board version is C03 (no missing solderbridge), Yocto is Kirkstone (kernel 5.15), ptp4l 3.1.1.I have added PG,8,AF11 to kernel’s device tree (in separate inc file): ethernet0_rgmii_pins_a: ethernet0-rgmii-0 { pins4 { pinmux = <STM32_PINMUX('G', 8, AF11)>; /*PPS OUT*/ }; }; Now I can see in gpioinfo output that it is used by kernel but still set as input.Then tried setting period for the PPS through ptp0 (tried different settings):echo “0 0 0 1 0” > /sys/class/ptp/ptp0/period The “clk_summary” shows and in general ptp4l works: ethptp_k
Hello,I am using the STWIN.box with the DATALOG2 firmware and would like to acquire data based on an external trigger signal from a speed sensor.My speed sensor provides an open-collector output, which is connected through appropriate signal conditioning to the STWIN.box.I would like to know:What is the recommended way to use an external GPIO as a trigger source in DATALOG2? Can a GPIO interrupt (EXTI) be used to start data acquisition or mark events in the recorded data? Are there existing examples in DATALOG2 that use external trigger inputs? Which GPIO pins are available for this purpose on the STWIN.box? For an open-collector speed sensor output, should I use an internal pull-up or an external pull-up resistor?My goal is to trigger or synchronize vibration measurements with the rotational speed signal.Thank you.
Environment - Device: STM32H562ZI- Reference manual: RM0481 Rev 5- HAL: STM32Cube H5 HAL Driver V1.5.0- Peripherals: GPDMA used for SPI slave Tx/Rx. SPI in slave mode, normal (non-circular) transfers, no linked-list. Summary On our SPI slave DMA path, the DMA channel becomes permanently stuck after an SPI error, and SPI communication never recovers until the device is power-cycled. The cause is that `GPDMA_CxCR.SUSP` gets written to a channel that has **already completed its transfer and stopped** (EN=0, IDLEF=1). In that state `GPDMA_CxSR.SUSPF` is never set, so `GPDMA_CxCR.RESET` is never written and **SUSP stays set**. Setting `EN=1` afterwards suspends the channel immediately after start, and the driver can no longer escape that state. Observed register sequence (Tx channel, real measurements) ```1) Block transfer completes. Hardware clears EN.CxCR = 0x00805D00 (EN=0, SUSP=0, SUSPIE=0)CxSR = 0x00000001 (IDLEF=1) 2) An SPI error occurs right after this point.SPI ErrorCode = 0x84 (UD
I’m trying to add openAmp to a stm32cubemx project (ioc). I add everything (IPCC1, openAMP exc) but when I compile the project[build] [ 5%] Building C object bsp/CMakeFiles/bsp.dir/CM33/OPENAMP/open_amp.c.obj[build] [ 6%] Building C object bsp/CMakeFiles/bsp.dir/CM33/OPENAMP/openamp_log.c.obj[build] [ 8%] Building C object bsp/CMakeFiles/bsp.dir/CM33/Core/Src/stm32mp2xx_it.c.obj[build] In file included from /home/marco/lavori/qmc/software/qmctest-m33/bsp/Middlewares/Third_Party/OpenAMP/open-amp/lib/include/openamp/open_amp.h:11,[build] from /home/marco/lavori/qmc/software/qmctest-m33/bsp/CM33/OPENAMP/openamp.h:25,[build] from /home/marco/lavori/qmc/software/qmctest-m33/bsp/CM33/OPENAMP/open_amp.c:21:[build] /home/marco/lavori/qmc/software/qmctest-m33/bsp/Middlewares/Third_Party/OpenAMP/open-amp/lib/include/openamp/rpmsg.h:15:10: fatal error: metal/compiler.h: No such file or directory[build] 15 | #include <metal/compiler.h>[build] |
Hello,I am currently trying to setup a blink example on NUCLEO-U5A5ZJ-Q and I have a bug using the default configuration from current CubeMX version (6.18.1).The generated binary ends up in an Error Handler in the SystemClock_Config function. The default clock configuration generated is the following: I have noticed that a similar issue has been notified in I have tried to use the bypasses mentioned in the previous post (setting the HSE source to 16 MHz, changing the SYSCLK Mux source, etc.) without success. Particularly, I am not able to find the setting allowing me to set HSE to “Crystal/Ceramic Resonator” in my CubeMX version.Thanks in advance for helping me resolve this setup issue,Best regards,Robin
Hi,I am trying to initialize FDCAN for my project. After the initialization I am clearing INIT bit in CCCR Register. The output what I can see is only CCE bit gets cleared but INIT bit is stuck at 1.Below is my code snippet.void Can_driver_init (void){ uint32_t StartAddress_l_u32 = CAN_RAM_OFFSET_CFG; uint32_t RAMcounter_l_u32 = 0; uint32_t ElementSize_l_u32 = (CAN_DATA_BYTES_CFG/4); // Enable the peripheral clock for FDCAN RCC->APB1HENR |= RCC_APB1HENR_FDCANEN; // Exit from Sleep mode */ CAN->CCCR &= ~FDCAN_CCCR_CSR; // Wait till the CSR bit is set in CCCR */ while (CAN->CCCR == FDCAN_CCCR_CSR); // Wait timeout to be added // Request initialization */ CAN->CCCR |= FDCAN_CCCR_INIT; // Wait until the INIT bit in CCCR register is set */ while ((CAN->CCCR & FDCAN_CCCR_INIT) != FDCAN_CCCR_INIT); // Wait timeout to be added // Enable configuration change */ CAN->CCCR |= FDCAN_CCCR_CCE; // Enable automatic retransmission
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