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In AN2606 Rev. 70, Chap 90 Device-dependent bootloader parameters table 226 the RAM area accessible from the bootloader seem inconsistant: - C031xx has a negative RAM range, excluding RAM at bottom and top of full RAM range as accessible from the bootloader- C01xx RAM range declares all RAM as accessible - C031xx excludes RAM at bottom and top of available RAM Please confirm these values. Thanks!

I need to use an external loader via single SPI for a project. Despite performing all the necessary steps. I'm getting an error through CubeProgrammmer./* Entry Point */ ENTRY(Init) /* Generate 2 segment for Loader code and device info */ PHDRS {Loader PT_LOAD ; SgInfo PT_LOAD ; } /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ /* Generate a link error if heap and stack don't fit into RAM */ _Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY { RAM (xrw) : ORIGIN = 0x20000004, LENGTH = 112K-4 } /* Define output sections */ SECTIONS { /* The startup code goes first into FLASH */ .isr_vector : { . = . + 0x1FC; . = ALIGN(4); KEEP(*(.isr_vector)) /* Startup code */ . = ALIGN(4); } >RAM :Loader .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >RAM .ARM : { __exidx_start = .; *(.ARM.exidx*) __exidx_end = .;

Hello,   In the reference manual rm0481 (stm32h562) in chapters 7.11.38 and 7.11.51 it is stated that EDATAx_STRT Bits do not have any hardware effect. Can I assume that the corresponding bits in FLASH_EDATAxR_CUR are set from option bits only? In that case what is purpose of these bits in FLASH_EDATAxR_PRG? Are rhey also set from option bytes? What about the EDATAx_EN bit in FLASH_EDATAxR_PRG? Here the documentation is NOT stating that there is NO hardware effect. Is this correct? If yes, where does the actual setting of EDATAx_EN in FLASH_EDATAxR_CUR come from? By the way in Table 51 there is an DATA_EN1 bit in FLASH_EDATA2R option bytes. May I assume that this is a documentation error and it should in fact be DATA_EN2   Thank you  

Hi,I have derived this code from the ST25NFCLib, and the software works correctly when interfacing with the NUCLEO-L476RG board.However, when I connect the same setup to my proto board, I observe a difference during the following I2C transaction.During the initialization process, the master sends command 0xDF (Measure Power Supply) and then waits for the IRQ signal.In the working setup, the IRQ status registers (1Ah–1Dh) return the values:00, 80, 00, 00Whereas in the non-working setup, the IRQ status registers return:00, 00, 00, 00I am not sure why the IRQ response is different in the proto board setup.Please note the following:Both the working and non-working setups use the same ST25R3918 daughter board.Both setups use the same interface signals: 3.3V, GND, IRQ, SCL, and SDA.The I2C communication speed is identical on both setups.I am attaching the I2C transaction screenshots for reference:The upper transaction belongs to the non-working setup.The lower transaction belongs to the work

I am using the latest STM32CubeIDE on a Windows platform - developing code for a STM32G0B1.I have a version.c file in my project that uses the __DATE__ and __TIME__ macros to create strings that I use in other modules.To ensure this file gets compiled on every build, I have a custom Pre-Build step that "touches" that file.  This all works fine.However, if I use the IDE to load the code into my hardware, it always does a build beforehand.  Because of this "touch", I get a new date string every time I run a debug session.Is it possible to replace the "touch" step with some kind of dependency on "all source files"?  In other words, can I make it so my version.c gets recompiled ONLY if some other source file has been updated?I know that I can turn off the "Build (if required) before launching" option.  But I'd rather keep that option as is, unless  changing it is the only way to do what I want.Thanks.  

Hi ST Community, I am working on STM32H563 with external SDRAM connected through FMC. I am trying to use: heap in SDRAM global variables in SDRAM execution/data access from SDRAM DCACHE enabled Current SDRAM mapping: 0xC0000000 I noticed that in STM32F7/H7 examples there is support for: HAL_REMAPMEMORY_FMC_SDRAM() which remaps FMC SDRAM memory regions internally. I found this in STM32F7 HAL: __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() But on STM32H563 I cannot find any equivalent remap mechanism or SYSCFG macro. My questions are: Is there any equivalent SDRAM remap functionality available on STM32H563 / STM32H5? Is SDRAM fixed permanently at 0xC0000000 on STM32H5 architecture? Does STM32H5 treat SDRAM at 0xC0000000 differently regarding: DCACHE burst accesses MPU memory attributes speculative accesses Are there any special MPU/DCACHE recommendations for using: malloc()/calloc() heap in SDRAM .bss/.data sections in SDRAM execution from SDRAM Current observations: SDRAM works correct

i have find the same issue with 3 system ..like whenever i try to generate new stm32 project i get the same error...before that i never get this kind of error why this happened now???

Hi,I spent a few days trying to make Ux_Device_HID and Ux_Device_HID_Standalone to work on Ubuntu with latest versions of CubeMX and Cube IDE (STM32CubeIDE Version: 2.1.1, STM32CubeMX 6.17.0)The only way I managed Ux_Device_HID to work on NUCLEO-H723ZG was by the following steps:start MXselect example for nucleo board and start project directly in CubeIDE (not doing anything in CubeMX)compile project in CubeIDE without any changesflash to the board and it worksHowever, if I want to open it in CubeMX and generate code even without any changes - the resulting code does not work at all. I used git to do diff and changes are all over..Of course I could do changes in CubeIDE directly without nice MX interface, but I kind of like it simple ))Anyway, could someone form ST explain why *.ioc file from example cannot be used with Cube MX to generate a working code?

C5  implements a way to de-activate selected boot devices. This will allow to use the system bootloader on custom board were some activity on pins used by the bootloader but not used for the bootloader would inhibit use of the bootloader. This feature has been requested before and is very welcome. However neither in RM0522 nor in AN2606 I find the explanation for the fifferent bits. Did I miss something?

Hi, I'm using the STM32WBA54KG microcontroller to comunicate by BLE. In STM32CubeMX (v6.13.0), I have actived the STM32_WPAN packet and the configuration "USE_TEMPERATURE_BASED_RADIO_CALIBRATION" is "YES".I need to read the Vcore channel to know if the battery is low. How can I do it? Thanks.

Dear Sir/Madam,We are currently working on the SPC560B50 MCU and would like to know the recommended development environment and debugging tools for this device.Could you please suggest:Recommended IDE for project development and codingRecommended compiler/toolchainRecommended debugger software for source-level debuggingRecommended hardware debugger/probe for SPC560B50Currently, we are using SPC5 Studio along with PEmicro Multilink. However, we are facing issues with flashing and debugging the target.Please share the recommended development workflow and tools for flashing, coding, and debugging the SPC560B50 MCU.Best regards,Pandiyan T

Hi ST community i just searched the GUI for EV-VNF9Q20F but could not find it. Please tell us where can i get suitable GUI. and also i'm really glad if you could check the availability of SPC582B against EV-VNF9Q20F.

Hello all,I'm working on an embedded project based on an STM32F030K6T6 microcontroller.The MCU is connected to an Adafruit TFT display with an integrated resistive touchscreen. The display is driven via SPI using the ILI9341 controller, while the touchscreen is interfaced using four wires (X+, X−, Y+, Y−).The resistive touchscreen is read by dynamically configuring the GPIO pins and performing ADC measurements to retrieve raw X and Y coordinates. These raw values are then calibrated and mapped into screen coordinates to detect user interaction with the UI.The graphical interface consists of four blocks:- RELAY_1_ON- RELAY_2_ON- RELAY_3_ON- RELAY_4_ONEach block behaves like a button. When the user touches a block:- the corresponding GPIO is set HIGH to drive a MOSFET connected to a relay.When the same block is touched again:- the GPIO is set LOW, turning the relay OFF.To handle touch interaction correctly, a simple state machine is implemented to detect press and release events, ensurin

(and why is this a problem?)It looks like the backup ram can not be called through unaligned access on my STM32U585. The mighty internet says that this should not be completely unexpected since it is basically a peripheral and no standard Ram.I have set up the BKPSRAM in the linker file like this:#include "partition.h" /* Entry Point */ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ _Min_Heap_Size = 0x000 ; /* required amount of heap */ _Min_Stack_Size = 0x800 ; /* required amount of stack */ /* Memories definition */ MEMORY { BKPSRAM (xrw) : ORIGIN = 0x40036400, LENGTH = 2K SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = NON_SEC_RAM_SIZE /* Secure is using end RAM3 (64k). Actual start is 0x20000000 and actual length is 768K */ FLASH (rx) : ORIGIN = 0x8000000 + APP_SLOT0_NON_SEC_APP_OFFSET, LENGTH = NON_SEC_APP_SIZE /* Memory is divided. Actual st

I could able to find only .hex output file for this demo app. Where is the source code ?

Hi communityI found a missconfiguration in CubeMX while using a MCU TFT with FMC.Description:Device: STM32N6 (STM32N645B0HxQ) / Cortex-M55CubeMX Version: v6.17.0Peripheral: FMC, LCD Interface, 16-bit data width, A16 as RS/DC (Register Select)Symptom: A single WriteCommand() call (one STRH instruction to 0x60000000) produces 3 WR pulses on the oscilloscope instead of 1. The LCD display remains gray despite a correct initialization sequence. All FMC timing parameters and Write FIFO settings were verified and are not the cause.Root Cause: The Cortex-M55 (ARMv8-M) treats 0x60000000 as Normal Memory by default. This allows the CPU to merge and reorder 16-bit write accesses into 64-bit bursts, resulting in multiple spurious WR pulses on the FMC bus. The LCD controller receives garbage data and cannot render anything.Solution: Manually configuring an MPU region for 0x60000000–0x63FFFFFF as Device nGnRnE memory resolves the issue immediately. After applying the MPU config, exactly 1 WR pu

I am currently working on a resolver ad2s1210. I have selected the required pins generated the code and entered my code and now it does not seems to be running. As the screen shows this Kindly let me know whats seems to be the issue here and how to rectify it.

Hello ST TeamI am using the ST25R3911B-DISCO board with an ST25DV16KC tag.I am trying to communicate with the tag directly from Python using the ST25R3911DISCOComm.dll from STSW-ST25R001.My setup is:ST25R3911B-DISCOST25DV16KCWindows PCPython 3.13ctypesThe DLL loads successfully.Reader connection works correctly.RF initialization works correctly.These APIs return success:rfalInitializeiso14443aInitrfalFieldOnAndStarGTcheckConnectionThe ST GUI software works correctly and can:detect the tagselect the tagread UIDread tag dataFrom Python I cannot:detect the tagselect the tagread UIDread memoryThe DLL exports these APIs:iso14443aSelectiso14443aRATSiso14443aPPStxrxBytesnfcTxNBytesnfcRxNBytesrfalStartTransceiverfalTransceiveBlockingTxrfalTransceiveBlockingRxrfalTransceiveBlockingTxRxrfalISO14443ATransceiveShortFramerfalISO14443ATransceiveAnticollisionFramerfalIsoDepInitializerfalIsoDepStartApduTransceivepollInterruptObserved issues:iso14443aSelect causes access violation.t2tRead4Pages returns

I am devoloping a low-power motion detector device using the STM32L071 mcu.The PIR sensor wakes up the system through wake-up pin, and after completing the RF packet transmission, the system goes back to sleep. In other words, I have a system that continuously switches between standby and run modes.How should I implement the watchdog in such a system ?I don't want the watchdog to keep counting while the MCU is in standby mode. I only it to run during run mode.My code like this (bare metal): int main(void) { /* USER CODE BEGIN 1 */ config_getresetflags(); /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ ws_register_sensor_driver(&ws_door_driver); ws_init_mx(); ws_wkp_src(); ws_init_se

Hello,In this file, the line:USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS_Pos;wrongly alters bits 1 to 3 of register HCSPLTThat can be fixed simply by removing this line, since middle payload is encoded by bits 00 in the XACTPOS field. 

Hello, I purchased an STLINK-V3PWR from Mouser. When I tried to use it, STM32CubeIDE 2.1.1 suggested updating the firmware. This failed, and the STLINK-V3PWR appears to be unusable (bricked). What can I do? Return the device for a refund/replacement? Or is there a way to re-flash the firmware using an STLINK-V3SET? If it is possible to restore the firmware by re-flashing it, where can I find the correct firmware? Kind regards, Jack.

Hello everyone,My apologies if this is in the wrong forum. I have a STEVAL-BMS114TX evaluation board and I'm wondering what to do with unmounted cells, since my pack is 5s. The datasheet for the L99BM114 says to short the unused PCB connectors together, but this definitely cannot be done on its corresponding evaluation board. Does anybody have any advice on how to move forward with this? The STEVAL-BMS114TX datasheet says that it can manage from 4 to 14 battery cells, but doesn't provide much clarity on unmounted cells.Thank you for the help. 

Hello everyone,We are currently designing a decentralized Battery Management System (BMS) node for our Formula SAE electric car. We selected the L99BM114 due to its robustness in automotive environments and high measurement accuracy.Our architecture requires this specific node to monitor a 5-series (5S) cell module. Since the L99BM114 supports up to 14 series cells, we will have 9 unused channels.While reviewing Section 6.8 of the datasheet (Unmounted cells), the exact hardware implementation for our case felt a bit ambiguous. We want to ensure our schematic doesn't trigger false internal diagnostics, such as Cell Open Wire or Balancing Short/Open.Could anyone clarify the recommended wiring for the unused pins in a 5S configuration? Specifically:Voltage Sense Pins (C6 to C14): Should all these unused inputs be shorted together and tied to the highest active potential (C5)?Balancing Pins (S and B) & Filtering: How exactly should we handle the external filtering resistors (RLPF) and

Dear Team,           Currently we are seeing part below in stock, Can we know if the parts were also assembled in China. Can you please check and confirm on the same. We are planning to procure 250# for production purpose.  MPN: STM32H533CET6 (or) STM32H533CET7Source: STMicroelectronics 

Dear Team,       We are currently using STM32H523CET6 in our designs. Can you please let us know if there any one is to one non- chinese alternative for the same. Please provide your support on this by treating this as critical, because we are holding our production.NOTE:Country of Origin/ Country of assembly/ Country of Manufacturing is NOT CHINA.