Recently active topics

Hello ST Community,While studying the STM32G491RE at the bare-metal level, I noticed a statement in RM0440 Rev. 9 that looked inconsistent with the Cortex-M4 architecture and the STM32G4 documentation when i compared. RM0440 - STM32G4 series advanced Arm-based 32-bit MCUsRevision: Rev. 9Section: 1.1 — General informationPage: 74The document states: “The STM32G4 series devices have an Arm Cortex-M4 with FPU core with Arm TrustZone.” However, the STM32G491RE uses a Cortex-M4 with FPU, which implements the Armv7E-M architecture. And Arm TrustZone-M is part of the Armv8-M Security Extension. Could ST please confirm whether the above statement in RM0440 Rev. 9 is incorrect?Thank you.

Hi Can you please tell me where I can find the safety manual for the SR5E1Ex series of micros? Many thanks Paul W.

User labels for handle structure In STM32CubeMX, the user can define a User Label for GPIO pins.For example:  User Label: LED_REDThis generates:#define LED_RED_Pin GPIO_PIN_5#define LED_RED_GPIO_Port GPIOAHowever, there is no User Label option for handle structures.For example:extern I2C_HandleTypeDef hi2c;extern TIM_HandleTypeDef htim2;extern ADC_HandleTypeDef hadc1;extern UART_HandleTypeDef huart1;Is would be nice to have al user label for a uart, so the application source can refer to that user label. For example:extern UART_HandleTypeDef MY_COM_huart;extern TIM_HandleTypeDef LED_RED_htim;Thanks,

Hello ST Team,We are using the VL53L8CX (VL53L8CXV9GC/1) ToF sensor with an NXP i.MX8MP running Linux over I²C.We understand that the VL53L8CX has an internal MCUWe would like to clarify: Does ST provide firmware updates/releases for the VL53L8CX? If yes, how can we obtain the latest compatible firmware? What is the recommended procedure to update/load the sensor firmware from a Linux host? Does ST provide any recommended firmware version-check or firmware update API for production devices? Please provide the recommended procedure, documentation, and any required ST software package/API. Thanks.

Dear Team, We are using the ST8R00WPUR boost converter to step up the input voltage from 5 V to 12 V in one of our designs.We would like to conduct a design review of the attached circuit. Please review the design and share your feedback/comments.Additionally, we noticed that the Junction-to-Board (θJB) thermal resistance data is not provided in the datasheet. We would appreciate it if you could share the Junction-to-Board thermal resistance value, as this information will be helpful for our thermal simulation and analysis. Best RegardsAbhishek

SummaryOn my STEVAL-VL53L9, the VL53L9CX boots, installs FW patch 0.17, reaches STREAMING with all error bits clear — and then faults on the very first frame. The reference SPAD array reports zero amplitude on every channel, as if the VCSELs never fire.I have reproduced this with two different VL53L9CX parts and three independent host implementations, each of which is known to work on another STEVAL-VL53L9. I have run out of things I can change from software, and I would like to understand what the firmware error codes mean.SetupBoard: STEVAL-VL53L9, VL53L9CX hand-soldered by me Host: ESP32 (DevKit v1) through the J2 header, plain I2C at 400 kHz, address 0x29 Clock: on-board 12 MHz Y1 (R25 removed, R24 fitted, R23 removed); EXT_CLOCK = 12000000 J3 (Host IO) = 3.3 V; VDDA_CFG = 2.8 V, VDDIO_CFG = 1.8 V XSHUT driven by the host, SYNC_IN tied high, INTR not used (FRAME_READY polled) FW patch 0.17 (9,865 bytes, byte-identical to vl53l9_patch.h in STSW-IMG053 / 53L9A1 BSP)SymptomDefault pro

Hello,I’ve run into what appears to be a documentation error or a H/W bug with the GPDMA on the STM32U585. I’ve set up a 512-byte circular DMA buffer with HT and TC interrupts to capture UART Rx data.  I’ve also enbaled DTE and SUSP interupts because I want to handle UART IDLE detection. In the UART IRQ handler (caused by IDLE), I suspend the DMA channel.  The DMA IRQ handler then triggers on SUSPF and I grab the current BNDT value, update an internal index, and then resume the DMA.  The DMA continues until the block is complete (TC), then reloads only the CxDAR from memory (only UDA set in CLLR update bits).  According to documentation, the BNDT value should be reloaded from an internal value stored when the channel was enabled.  This works as expected until the TC after suspend/resume event.  After a suspend/resume, the BNDT appears to reload a different value, and continues to use that new value. The only work around I found was to add UB1 to the CLLR update bit fields and provide a

Hello Team,We need clarification regarding OBKey Storage, Internal Trusted Storage (ITS), and Protected Storage (PS) in the STM32H5F5 device when using the Secure Manager framework.Is the OBKey, ITS and PS storage physically located within the device's 4 MB internal Flash memory, or does it reside in a dedicated secure memory region? Can a Non-Secure (NS) application directly read from or write to ITS, OB KEYS, PS storage areas in terms secure manager? If direct access is not allowed, what are the security mechanisms that prevent NS access?Regards,RJ

I have a NUCLEO-F091RC (on-board ST-LINK/V2-1, USB ID 0483:374b, latest firmware V2J33M25). When plugged directly into my Mac it enumerates and drops repeatedly. LD1 keeps blinking red.I found the ST FAQ "Possible communication failure between STLINK-V3 and some recent computers" (eUSB2 repeater interoperability). My symptoms look very similar, but my probe is a V2-1 that enumerates at full speed (12 Mbps), not a V3, so I'd like to know if the V2-1 is affected too.SetupMacBook Pro 14-inch (Nov 2023), Apple M3 Pro, macOS Tahoe 26.7.1 USB-C to Mini-B cable, directly into the MacSymptom (from log stream, repeating about every 0.3 s): enumerated 0x0483/374b/0100 (STM32 STLink / 1) at 12 MbpsAppleUSBIORequest::complete: device 1 (STM32 STLink) endpoint 0x00: status 0xe00002ed (transaction error): 0 bytes transferredAppleUSBHostPort::terminateDevice: destroying 0x0483/374b/0100 (STM32 STLink): hardware connection lostioreg -p IOUSB -w0 shows a new STM32 STLink entry with a different id every

On STM32H733, the HAL provides __HAL_DBGMCU_FREEZE_FDCAN() in stm32h7xx_hal.h but it is conditionally compiled:#if defined(DBGMCU_APB1HFZ1_DBG_FDCAN)#define __HAL_DBGMCU_FREEZE_FDCAN() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN))#endifDBGMCU_APB1HFZ1_DBG_FDCAN is not defined in stm32h733xx.h, so the macro does not exist at compile time and calling it gives:error: implicit declaration of function '__HAL_DBGMCU_FREEZE_FDCAN'Questions:Is FDCAN freeze during debug halt supported on STM32H733? If yes, why is DBGMCU_APB1HFZ1_DBG_FDCAN missing from stm32h733xx.h — is this a bug in the device header? What is the correct bit position to use as a workaround via direct register write? I need to pause the FDCAN peripheral during debugging, that is my goal. Thanks you very much for helping me out. 

I configured ADC1 to be triggered by TIM2_CH2 and TIM2 compare channel 2 on STM32F429 with CubeMX, and enabled their interrupt, TIM2 CC2 ISR was run but ADC EOC ISR not run. I tested both by LED and by debug in CubeIDE, both results were the same. When debug in CubeIDE, after TIM2 CC2 ISR was run, STRT=0 and EOC=0 in ADC1 SR, which indicated that ADC1 was not triggered. However, if I configured ADC1 to be triggered by TIM2_TRGO and TIM2 trigger output from Update event, ADC1 was triggered.My settings in CubeMX:CubeMX and CubeIDE project files:

I want to have asynchronous USB audio with the STM32g431k6 and an external DAC but I get conflict message if need both. Am i missing something? if i use OSC IN as audio clock input it will not bypass the internall PLL as in I2S_CKIN isn’t it? I thought it was due to the product used (32pins) but with the 48 is the same. So the question is how do i do that?

Whenever I generate the code for the example, the file hrs_app.c gets truncated to about 5K. This cases some warnings. If I copy the file from the example area to the care generated by CubeMX, it is 8K and the warnings are not issued.Is this a problem with CubeMX or is it operator error?

Does anyone know whether STM32U585 contains a die shield?

From the manual for the P-NUCLEO-WB55 USB dongleBy default, the embedded STM32WB55RG microcontroller is supplied by 3V3, but the board offers another possibility to supply the device through the extension connector. The 3.3 V can first come from the USB and the LDO (5 to 3.3 V). Moreover, STM32WB55RG can be supplied by an external source, between 1.8 and 3.3 V. If the USB connector cannot supply the MCU, it is necessary to turn SB4 OFF and connect a power supply to the extension connector (pin 6 of the CN1 connector). So when I look at SB4 on the board it looks like it is unbridged, see pic below. Does this mean its off? If so how come I can still power it through the USB-LDO 3V3 route? I would like to power through the connector so I can gauge how much current its drawing without USB connection.  

Hello everyone,I am experiencing an issue with the FreeRTOS Kernel Awareness view in STM32CubeIDE, specifically regarding the task runtime statistics. The plugin seems to be failing to parse or display the correct runtime percentages, showing almost all tasks permanently stuck at 1% or <1%.My Setup & Recent Changes: MCU: STM32G474 IDE: STM32CubeIDE v2.2.0 Previous RTOS: FreeRTOS V10.3.1 (Generated via STM32CubeMX with the CMSIS-RTOS v2 wrapper) Current RTOS: FreeRTOS V11.3.0 (Added manually via the ARM software pack, bypassing CubeMX generation) The Problem: I recently migrated my project to native FreeRTOS V11.3.0. I removed the old CubeMX-generated middleware and integrated the new version using the ARM pack. I also configured everything required for runtime statistics to function properly (setting configGENERATE_RUN_TIME_STATS, configuring the hardware timer via portCONFIGURE_TIMER_FOR_RUN_TIME_STATS(), and setting up portGET_RUN_TIME_COUNTER_VALUE()).While the project

We are studying the STDES-DABBIDIR 25 kW bidirectional DAB reference design (UM3198 Rev 2, TN1435, schematic and BOM v2.0) for a 30 kW EV charger power module. Two items in the documentation are not publicly available:1. A2H6M12W3-F: UM3198 uses two of these ACEPACK 2 half-bridge modules on the low-voltage side, but st.com has no product page or datasheet for this part. Has it been released? If not, what is the recommended production equivalent?2. Frenetic transformer, design reference 32011-04 (turns ratio 1.78, five stacked E80/38/20 cores), and the 28.6 uH auxiliary inductor: can ST share a specification or drawing, or should we request these directly from Frenetic?Thank you for any pointers.

Dear ST Community,I am currently testing the position control functionality using the following API: MC_ProgramPositionCommandMotor1(target, duration_s);I would like to clarify the behavior of the duration parameter. Does this parameter define only the expected movement duration, or does the position control algorithm also ensure that the motor reaches the specified target position within that duration?I am testing a case where the target position is intentionally very large: float actual = MC_GetCurrentPosition1();float commanded_target = actual + 10000;MC_ProgramPositionCommandMotor1(commanded_target, 2.0f);In this case, completing a 10000-radian movement within 2 seconds is physically unrealistic for my motor.I am monitoring the control status using the following code: uint32_t start = HAL_GetTick();printf("ms (planned %ld ms)\r\n", (long)(MC_GetMoveDuration1() * 1000));while (1){ if (HAL_GetTick() - start < 10000) { printf("Control status : %d state : %d Fault

Hello everyone,I am designing a board using an STM32U5 / STM32H5 microcontroller and I have a question regarding the power supply architecture, specifically concerning the independent voltage domains.My Scenario:Main VDD: 3.3V (required for correct USB functionality/transceiver management via VDDUSB). VDDIO2: 1.8V (supplied independently to interface with low-voltage external peripherals). The Issue:According to the reference manuals and datasheets, there are specific power-up and power-down sequencing requirements, as well as constraints on the voltage levels between different domains (e.g., VDDIOx vs VDD).Is it fully supported to run VDD / VDDUSB at 3.3V while simultaneously running an OCTOSPI/HyperBus at 1.8V?Thanks in advance for your help!

Hi  I am using a custom board to run a stm32h743 with a ov5640 camera. There is external ram fitted, the camera sets up correctly using i2c, and i can run the captureHAL_DCMI_Start_DMA(&hdcmi,DCMI_MODE_SNAPSHOT,(uint32_t)pFrameBuffer, (512 * 1024) / 4); However what i am getting in the buffer is just repeated garbage.  is there any help you can give or at least something to look at.  

I can view the variables concerned either in Watch and Live Watch window, but i have no way to edit them. In Watch window, double-click only allows me to edit the expression instead of its value. VScode document says I can edit variable value in “Variable” window, but i can’t see global variales there.

IssueI am working on an iOS application that uses the ST25SDK for NFC operations.The ST25SDK documentation indicates that the iOS SDK is based on J2ObjC 2.4. I downloaded the J2ObjC 2.4 source and attempted to build it locally on an Apple Silicon Mac.However, I am currently unable to complete the J2ObjC 2.4 build. I have also tested J2ObjC 3.1, which builds successfully in the same environment.QuestionCould you please confirm whether J2ObjC 3.1 is supported/compatible with the ST25SDK iOS version I am using, or whether the application must specifically use J2ObjC 2.4?In particular, I would like to clarify: Is J2ObjC 2.4 a strict requirement for the ST25SDK iOS Objective-C sources? Can J2ObjC 3.1 be used as a drop-in replacement if it successfully builds? If J2ObjC 3.1 is not compatible, are there any required patches or source changes that would allow the ST25SDK to work with J2ObjC 3.1? Is there an official/prebuilt J2ObjC 2.4 distribution recommended for the current ST25SDK, so

Hello,I've looked at X-CUBE-PQC (ML-KEM, ML-DSA, LMS/XMSS verification) and the recently announced ST54M with its PQC accelerator. Two things I couldn't find answers to:X-CUBE-PQC currently targets the STM32H563. Are other STM32 families planned? Is the implementation hardened against side-channel attacks, or is it intended for unprotected use? Does ST plan hardware acceleration for ML-KEM/ML-DSA (NTT, Keccak) in future STM32 parts, like the SHA-3 accelerator in Stellar or the ST54M engine? If so, which families, broadly?I understand roadmap details may not be public, so "under consideration" or a pointer to the right contact would already help. Thanks!

Hi everyone,I am working on a three-phase BLDC motor control application using the following components:MOSFET: STL90N6F7 Gate Driver IC: DRV8334 Microcontroller: STM32G431RBT3 DC Bus Voltage: 24 VDC Motor Speed: 60,000–70,000 RPM Measured Peak load Current: Approximately 5 AThe motor is operating normally; however, when running at higher speeds (approximately 60,000–70,000 RPM), the MOSFET package surface temperature rises to around 60°C.Considering that the DC bus voltage is 24 V and the measured peak input current is approximately 5 A, I would like to understand why the MOSFETs are experiencing this level of heating at high RPM.Could the heating be caused by switching losses, gate-drive voltage, dead-time settings, PWM frequency, reverse-recovery losses, PCB layout, or other factors associated with high-speed motor operation?I would appreciate any suggestions on how to identify the root cause and reduce the MOSFET temperature. If anyone has encountered a similar issue with the DRV83

Hi ST expert,I am developing a 3P4W Smart power meter C&I class, we are planning to design a multi-rate data sampling! S1 for power metrology by dedicated metering IC ADE9000, S2 for feature-stream acquisition NILM inference at 4 kHz continues sampling rate by internal ADC of STM32H755 and S3 for transient capture at 20kHz triggered capture by ADS131M08. Communication that STM32H775 would handle including Wi-Fi, RS485, 100Mbit ETH, SD card 32GB(eMMC optional) status LED x3 and USB-C for programming and debugging. We also have AI model to build into the MCU for edge inference, time series model! I not sure if STM32H755 series can handle all this tasks or not. Could you please help me evaluate this platform for my design? Additional info, please let me know. Thank you.