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rleigh-electradx · 2024-09-05

Hi folks,I'm trying to use a timer to generate a PWM output on a single output channel, but vary the frequency each cycle by updating the ARR register with DMA updates. I think I set everything up correctly, but when I call HAL_TIM_Base_Start_DMA(),...

rleigh-electradx · 2024-09-05

A note on the initial pulses. If I alter HAL_TIM_Base_Start_DMA() like this: /* Enable the TIM Update DMA request */ __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); /* Update ARR preload via update event */ htim->Instance->EGR = TIM_EGR_UG; if...

rleigh-electradx · 2024-09-05

The solution was a very simple one. The BNDT is in bytes, not bursts, so I was off by a factor of four. Multiplying by four made it come to life nicely:The only remaining niggle is that the first two pulses are using the default ARR value before th...

rleigh-electradx · 2024-09-05

I'm assuming that since this validation error arises directly from the GPDMA1 peripheral, the error must be in either the CubeMX configuration (or the code gen if it's a bug). Looking at the actual registers which are validated:I can't see anything ...

rleigh-electradx · 2024-09-05

Thanks, I've pinned down when it happens:Unfortunately it's in the return statement at the end, so it's triggered immediately after calling __HAL_DMA_ENABLE(hdma) and not in any of the setup code directly. It at least identifies where to dig next!

rleigh-electradx · 2024-09-05

Hi,Thanks for the reply. You're certainly right about the cache; I switched it to using HAL_DCACHE_CleanByAddr() instead.The timer is definitely started; I can see CNT incrementing, and I can also see the PWM output from the channel. By the way I o...

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