Posted on June 16, 2015 at 14:25The original post was too long to process during our migration. Please click on the attachment to read the original post.
Posted on June 16, 2015 at 16:59Okay, some small progress: The OVR bit most likely comes from the debugging process where the SPI kept receiving data while the CPU was halted at a breakpoint. I'm starting my transmissions from a timer overflow inter...