Posted on May 17, 2011 at 13:34We have a problem with the I2C bus hanging with the clock stopping in a high state and the data line low. There are two slave devices on the I2C2 bus, an EEPROM and a DAC. This occurs at 200 and 100 KHz bus speeds. Thi...
Posted on May 17, 2011 at 13:31We are using I2C2 without a problem with the start bits. Check your GPIO setup. May be a hardware problem, maybe PB11 is being pulled up.
Posted on May 17, 2011 at 13:21The document PM0042 states that ''During a write opertion to the Flash memory, any attempt to read the flash memory will stall the bus''. Does this mean that the code performing the write must be executed out of RAM or...
Posted on May 17, 2011 at 13:08We have I2C1 connected to two slave devices. We can interface with both devices when the FSMC clock is not running. When we turn on the FSMC clock the I2C1 interface does not work. It looks like clock and data lines ar...
Posted on May 17, 2011 at 13:03I have UART5 working. It turns out that the Rx port is PD2 and not PC2 that the example code has. The example in USART\printf is in error!! The example assume that both Rx and Tx pins are on the same GPIO port. They al...
