About IvanFromCyberia

IvanFromCyberia · 2024-02-24

I am running STM32G431 board with USBC PD feature.CubeIDE 1.14.1I am trying to bring up the UCPD stack.I refer the basic guideline:https://wiki.st.com/stm32mcu/wiki/STM32StepByStep:Getting_started_with_USB-Power_Delivery_SinkIt worked ideally.However...

IvanFromCyberia · 2024-02-24

Hello, I am running STM32G431 board with USBC PD feature.CubeIDE 1.14.1I am trying to bring up the UCPD stack.I refer the basic guideline:https://wiki.st.com/stm32mcu/wiki/STM32StepByStep:Getting_started_with_USB-Power_Delivery_SinkIt worked ideally....

IvanFromCyberia · 2024-02-11

STM32G4 reference manual description offers only monitoring "Busy flag (BSY)" to check if SPI transfer is complete.In order to make sure the transfer is over I have to do polling of this bit. It is waste of time and resources.Is there any other reaso...

IvanFromCyberia · 2024-02-12

Yep, It is the only way to make it work, but, there is a trade of between complexity and wasted CPU resources.With extra timer I eventually make things more complex, If I have this extra timer available, for each SPI instance, though.Still, I did no...

IvanFromCyberia · 2024-02-12

I run SPI in half duplex master mode.It runs either one - TX or RX only at a time. If I have TX, RX is not active. RX DMA is not usable here.Also, I found that if I run RX only - it starts receiving immediately and endlessly.I have to stop it by SW w...

IvanFromCyberia · 2024-02-11

I believe when DMA or SPI interrupt report about SPI Sending data is complete - it means that all data is sent to SPI DR register, and it does not mean the SPI transfer itself is complete . Eventually part of it will be in transfer and the rest will ...

IvanFromCyberia · 2024-02-11

RXed data may come with SPI or DMA interrupt. It it inevitable, and it is not polling.Eventually I am 100% sure the transfer is over.Extra time is a solution, but it takes extra measures.I wish I have simple SPI BSY event flag with interrupt.

IvanFromCyberia · 2024-02-02

What can I say!? RTFM!!!!Timer has more than 1 interrupt lines.And!!! Lines are often muxed with it's own or other IPs interrupt lines, when connected to NVIC.It is different for each timer (T1/T8/T20).Pay attention to NVIC settings when expect to us...

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stm32g431 ucpd sink stack fail at -o2/-o3/-oFast optimization levels

stm32g431 ucpd sink USBPD_DPM_RequestMessageRequest busy forever

Detecting the complete end of SPI transfer in TX master mode, other than BSY flag polling

Re: Detecting the complete end of SPI transfer in TX master mode, other than BSY flag polling

Re: Detecting the complete end of SPI transfer in TX master mode, other than BSY flag polling

Re: Detecting the complete end of SPI transfer in TX master mode, other than BSY flag polling

Re: Detecting the complete end of SPI transfer in TX master mode, other than BSY flag polling

Re: TIM1 break interrupt not firing