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stryga · 2024-02-22

Hi, I am using 3 DMA channels of DMA1 on a STM32G4* to transfer data from the 3 ADCs to mem. At a certain point I want to make sure that all transfers are done and enter a while loop: uint32_t timeoutCnt = 0; while(!LL_DMA_IsActiveFlag_TC1(DMA1) || ...

stryga · 2023-10-02

Using STM32_Programmer_CLI.exe (v2.13.0, on Win10) I try to connect via ST-Link / SWD, It works perfectly in the GUI but if I trySTM32_Programmer_CLI --connect port=SWD ap=1nothing happens, not even an error, it just terminates. I can even write nons...

stryga · 2024-02-26

Flags are cleared through HAL calls to LL_DMA_ClearFlag_TC... - since the DMAs have a dedicated clear-register (IFCR), there is no read-modify-write. You just write a 1 at the flag you want to clear, 0s do nothing. I'll collect more data and come bac...

stryga · 2024-02-26

Thank you for the input.Waiting for longer doesn't help. We had 2000 wait cycle for some time, no difference. The logging says that usually all 3 channels are stuck - strange. I have to double check how I log it. Error handling means going to safe st...

stryga · 2024-02-22

Thanks for your suggestions. ADCs are triggered every 60 to 100 µs, adc-clk is 42Mhz and sample time is 47.5 cy, translating to 1.12µs, so the SAR should have ample time to finish. Well, in the beginning we had no timeout counter and back then the de...

stryga · 2024-02-22

As far as I know cross-connection CAN RxTx is not the recommended solution - it depends on the internal logic of the CAN frontend. See https://community.st.com/t5/stm32-mcus-products/on-board-communication-via-can-without-transceiver/td-p/152684 for ...

stryga · 2024-02-22

Hi!Did you enable the DMA interrupt in the NVIC settings? (in the ioc) I never used the HAL_ADC_Start_DMA, but are you sure that the source (ADC->DR) and target addresses are set correctly? It's strange, that HAL_ADC_Start_DMA uses uint32_t - the reg...

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DMA Transfer Complete Flag strange behavior

connect problem - no response at all

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