About AMacI.1

AMacI.1 · 2023-10-02

I’m working on a project that uses an STM32H745IIK6. Occasionally, 32-bit SPI read data was invalid. This happened in about one out of every two hundred reads. To track down the cause, I added a few lines of code to toggle a GPIO pin as a scope trigg...

AMacI.1 · 2021-07-08

I’m using STM32Cube MX 6.2.1, STM32Cube IDE 1.6.1 and STM32Cube_FW_H7_V1.9.0 for a STM32H7A3 project. As recommended, I configured the HAL time base source to a timer other than systick. (TIM17) If I understand correctly, FreeRTOS uses systick and se...

AMacI.1 · 2021-07-06

I’m using STM32CubeMX 6.2.1, STM32CubeIDE 1.6.1 and STM32Cube_FW_H7_V1.9.0. I found that the MX generated init code (LL) for DAC2 calls LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC12) when it should call LL_APB4_GRP1_EnableClock(LL_APB4_GRP1_PERI...

AMacI.1 · 2020-01-09

The STM32H742xI/G STM32H743xI/G data sheet (DS12110 Rev 7) implies VDDLDO can be supplied separately from VDD. “When it is not available on a package, the VDDLDO pin is internally tied to VDD.�? And “VDDLDO ≤ VDD�?. However, on the STM32H743VIH6, VDD...

AMacI.1 · 2023-10-02

A __DSB() prior to to LL_SPI_TransmitData32() works as well and is cleaner. Thanks!

AMacI.1 · 2020-01-04

I noticed this problem with STM32CubeMX 5.4.0. The code generated by the previous MX version did call HAL_NVIC_SetPriorityGrouping. I added the call to /* USER CODE BEGIN MspInit 1 */ as a workaround.

User statistics

User Activity

STM32H7 SPI chip select intermittently delayed

FreeRTOS and timebase interrupt priority

STM32H7A3 DAC2 clock enable

Is the STM32H743VIH6 VDDLDO pin connected internally to VDD?

Re: STM32H7 SPI chip select intermittently delayed

Re: Generated code doesn't call HAL_NVIC_SetPriorityGrouping