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JCout.11
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2022-12-13
2023-06-14
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Re: Interface SDMMC using FileX middleware issue in 4-bit bus width mode - STM32
2023-03-29
How did you correct this? I corrected it by switching the HAL_SD_WriteBlocks_DMA to HAL_SD_WriteBlocks, (and the same on the read side) which works, but now I'm having massive performance issues, and am wondering if this is why.
Re: How to enable ADC1 on NUCLEO-U575ZI-Q?
2023-02-07
HAL_PWREx_EnableVddA(); placed between MX_ADC1_Init and HAL_ADC_Start in main.c seems to work.
Re: Interface SDMMC using FileX middleware issue in 4-bit bus width mode - STM32
2022-12-13
Were you able to resolve this issue? I'm seeing a similar issue on the same processor.
