About FBar.2

FBar.2 · 2023-03-31

Created a project template via CubeMX: STM32G030 is SPI slave and uses circular DMA bufs for transfers.As SPI master I'm using an ESP32 running micropython. This, though, should be irrelevant, as I don't rely on its output but what the Logic Analyze...

FBar.2 · 2023-03-31

So what you're saying is I will need some kind of starting/reset sequence - either way, correct?But then again, even if I listen for that on the slave and prepare, apparently I can't be sure what I put into the buffer will end up on the wire.Or I'M (...

FBar.2 · 2023-03-31

Thinking about it: what are the actual implications of what you're saying?That my buffer is misaligned? The way I see it it's 8*4 bits - which is exactly 32 bits and would fulfill this condition of being (a multiple of) 32bits - doesn't it?

FBar.2 · 2023-03-31

Wrong thread, please delete (can't do so myself)

FBar.2 · 2023-03-31

Thank you, not saying your solution doesn't suit, but I'm not using NSS (as in: NSS_SOFT, as this slave is my only slave on the SPI bus).Can I still use this approach without having the NSS pin I can attach the INT to?

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stm32 as SPI slave, full-duplex transmission via circular DMA buffer: changes to MISO buffer not (completely) reflected in transfer

Re: stm32 as SPI slave, full-duplex transmission via circular DMA buffer: changes to MISO buffer not (completely) reflected in transfer

Re: stm32 as SPI slave, full-duplex transmission via circular DMA buffer: changes to MISO buffer not (completely) reflected in transfer

Re: stm32 as SPI slave, full-duplex transmission via circular DMA buffer: changes to MISO buffer not (completely) reflected in transfer

Re: stm32 as SPI slave, full-duplex transmission via circular DMA buffer: changes to MISO buffer not (completely) reflected in transfer