About THunn.1

THunn.1 · 2022-01-04

My program sets D1, D2 and D3 up as identical GPIO inputs. All are pull-ups. Tests using STM32CubeIDE in debug shows both working perfectly and independently as the circuit is opened and closed to pull the input down and allowing it to pull up agai...

THunn.1 · 2021-07-05

This is not a priority question. I'm just curious as to how USART2 and debugging can operate at the same time but I'm happy that it does.

THunn.1 · 2022-01-04

I am told that LL_SYSCFG_DisableDBATT(LL_SYSCFG_UCPD1_STROBE | LL_SYSCFG_UCPD2_STROBE); soon after start up appears to have fixed the problem. Thank you everyone for your help.

THunn.1 · 2022-01-04

Thank you. You're right about the different names used on the different MCUs... hence the reason why I want to use the LL_ commands to produce a reasonable level of abstraction despite all the underlying differences. I don't think my application ca...

THunn.1 · 2022-01-04

I think I've found what I'm looking for:__STATIC_INLINE void LL_SYSCFG_DisableDBATT(uint32_t ConfigDeadBattery);is defined in stm32g0xx_ll_system.h. So a call such as this just after power on should fix my problem:LL_SYSCFG_DisableDBATT(LL_SYSCFG_U...

THunn.1 · 2022-01-04

I found https://community.st.com/s/question/0D53W00001Co83hSAB/why-does-the-dead-battery-feature-of-ucpd-cause-issues-reading-the-cc-voltage the most interesting. No I don't want to use the dead battery feature ... I want PD2 and PD3 to be GPIO inpu...

THunn.1 · 2022-01-04

I do indeed mean the GPIOs PD2 and PD3. Thank you ... I will search for "dead battery".

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Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?

I was trying to debug USART2 code on a Nucleo-G0B1RE development board. Unfortunately the ST-LINK was on the same pins. I assumed that I couldn't use the STM32CubeIDE debug while the pins were in USART2 mode ... but I tried it and it worked. How?

Re: Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?

Re: Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?

Re: Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?

Re: Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?

Re: Setting D2 and D3 as GPIO inputs on NUCLEO-G0B1RE and power cycling appears to be causing a permanent short circuit between D2 and D3. Can you give me any knowledge or insight about this?