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KRogo · 2019-05-15

KRogo · 2019-03-02

Consider: The pins are ultimately driving Power Mosfets, wherein the state of the outputs is of significant importance.However, between the time when one changes the MODER register(s) for the appropriate pin(s) to AF and the time when one changes th...

KRogo · 2019-05-15

Thanks very much for your reply!I suspected something like that. I'm relatively new to this CPU and also to C on this CPU. On the CPU's I have worked with extensively, I've coded mainly in assembly.In those cases, I could always use a SINGLE 32-bit...

KRogo · 2019-03-04

I appreciate your response. I am understanding of your comments. I will reassert the issue:The ST library stm32f0xx_gpio.c at GPIO_PinAFConfig (which sets the AFR register) says:"The pin should already been configured in Alternate Function mode(AF)...

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Why does uVision (Armcc V5.06) C turn this: SPI1_TX8(addr >> 8); Into this: LSLS r0,r4,#16 LSRS r0,r0,#24 BL SPI1_TX8 Why not just shift 8? By the way addr is uint32_t (unsigned int)

What state is the port pin in between GPIO MODER changes and GPIO AFR changes?

Re: Why does uVision (Armcc V5.06) C turn this: SPI1_TX8(addr >> 8); Into this: LSLS r0,r4,#16 LSRS r0,r0,#24 BL SPI1_TX8 Why not just shift 8? By the way addr is uint32_t (unsigned int)

Re: What state is the port pin in between GPIO MODER changes and GPIO AFR changes?