The description of the VCCLO pin says it goes low when Vcc is below Vth+.However, the timing diagrams 20 and 21 show VCCLO going low tdebounce after VCC drops below Vth-.Which is correct?
How are the Activity/Inactivity registers used? ACT_THS (04h) and ACT_DUR (05h)Can the LSM9DS1 be configured to automatically go to low-power mode, or does the host need to do that?
Never mind...that's what the DRDY_M pin is for!BTW, there is a bug in the "Standard C platform-independent drivers" (lsm9ds1_STdC). When reading the Magnetometer data, you must read all the 6 data registers (0x28 to 0x2D) to clear DRDY_M./**
* @bri...
