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LSM9DS1 Magnetometer data ready interrupt possible?

Damon Kelly
Associate II

Is it possible to generate an interrupt on INT_M when the Magnetometer data is ready (in the same way you can with the Acc/Gyro)?

2 REPLIES 2
Damon Kelly
Associate II

Never mind...that's what the DRDY_M pin is for!

BTW, there is a bug in the "Standard C platform-independent drivers" (lsm9ds1_STdC). When reading the Magnetometer data, you must read all the 6 data registers (0x28 to 0x2D) to clear DRDY_M.

/**
  * @brief  Magnetic sensor. The value is expressed as a 16-bit word in
  *         two’s complement.[get]
  *
  * @param  ctx    Read / write interface definitions.(ptr)
  * @param  buff   Buffer that stores the data read.(ptr)
  * @retval        Interface status (MANDATORY: return 0 -> no Error).
  *
  */
int32_t lsm9ds1_magnetic_raw_get(lsm9ds1_ctx_t *ctx, uint8_t *buff)
{
  int32_t ret;
  ret = lsm9ds1_read_reg(ctx, LSM9DS1_OUT_X_L_M, buff, 6);
  return ret;
}

To read data in both the Accel/Gyro and the Magnetometer, b7 (RW) is set.

However, for the Magnetometer, you must also set b6 (MS) to auto-increment the register address. If you don't set this, you only read the first register 6 times, and DRDY_M is not cleared.

I cannot seem to find a control register in the Magnetometer that turns auto-increment on.

The code should look like:

/**
  * @brief  Magnetic sensor. The value is expressed as a 16-bit word in
  *         two’s complement.[get]
  *
  * @param  ctx    Read / write interface definitions.(ptr)
  * @param  buff   Buffer that stores the data read.(ptr)
  * @retval        Interface status (MANDATORY: return 0 -> no Error).
  *
  */
int32_t lsm9ds1_magnetic_raw_get(lsm9ds1_ctx_t *ctx, uint8_t *buff)
{
  int32_t ret;
  ret = lsm9ds1_read_reg(ctx, LSM9DS1_OUT_X_L_M + 0x40, buff, 6);
  return ret;
}

Eleon BORLINI
ST Employee

Hi Damon, thank you for the detailed explanation of the issue. About the auto-increment, you should implement it for the I2C communication acting on the MSB of the sub-address:

"After the START condition (ST) a slave address is sent, once a slave acknowledge (SAK) has been returned, an 8-bit sub-address (SUB) is transmitted. The 7 LSb represent the actual register address while the MSB enables the address auto increment. The SUB (register address) is automatically increased to allow multiple data read/write".

Regards