By resistor calculation and also by given graphic it is possible to adjust UVLO voltage as 4.5. However, in datasheet, it is written that using UVLO below 8V is not recommended. What happens if UVLO threshold used as 4.5 V?

Specifically, PortA.15 pin goes "HIGH" after reset for 5ms. It can be seen on picture. (Blue is the VDD supply, yellow is PortA.15) PortA.15 pin has an alternate function “SYS_JTDI�?. This situation cannot be seen on other pins which configured the s...