I have an application running on an STM32H745 MCU on a custom board. I'm initializing both USB ports (FS and HS) but I'm not using a HS PHY, I'm using both ports as FS.I have an intermittent issue where either or both ports fail to initialize because...

How many clock cycles should it take to write to AXI SRAM from the M7 core, assuming that the cache is disabled (and disregarding instruction pipelining)?The reference manual says:"The system AHB SRAM can be accessed as bytes, half-words (16-bit unit...

I configured IAR EWARM for dual core debugging of an STM32H7 processor following instructions from one of ST's application notes (AN5286).When I do, I get the following warning repeated endlessly in the log window:"Tue May 26, 2020 10:13:04: SWO not ...