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TNaum
Associate II
since ‎2018-11-06
‎2023-10-13

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Why does TF-A print "INFO: ETZPC: UART1 (3) could be non secure"?

2023-10-13
Hi,in our STM32MP project, we have some unused securable peripherals. We generate our devicetree bindings with CubeMX where we have not selected anything for these peripherals. Accordingly, they do not show up in the `st,decprot` attribute in the `&e...

Memory Information for stm32l452ccux is wrong in Keil.STM32L4xx_DFP.2.5.0.pack

2021-01-13
In Keil.STM32L4xx_DFP.2.5.0.pack, which can be downloaded at https://www.keil.com/dd2/pack, the memory information for stm32l452 says that the ram size is 0x00020000 = 128kB, but it actually is 0x00028000 = 160kB (SRAM1 + SRAM2).Using this file for m...

On STM32MP1 devices, are 32-bit accesses to SRAM1,2,3,4 atomic?

2020-12-10
We would like to share data between the A7-core and the M4-core on an STM32MP1 device. Those cores both have access to the SRAM1,2,3,4 . The M4-core is connected directly via the AHB interconnect, the A7-core is connected via the AXI-based NIC-400 in...

Is it possible to handle UART IDLE line detection with the HAL library? If not, which is the nicest way to implement it?

2018-11-06
I am using the HAL library to use my MCUs peripherals and I would like to use the IDLE line detection of the UART controllers. To me, it seems that the HAL library does not offer any callback for IDLE line detection so I think it is not possible to u...
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