I'm trying to set up the clock tree, and D1CKRDY becomes ready, but for some reason D2CKRDY does not. Here is the code:// Clock setup
RCC->CR |= RCC_CR_HSEBYP; // Set HSE as...
Have you checked the Nucleo boards that use the Microchips LAN8742A? For instance, the NUCLEO-H563ZI uses a NDK NX2016SA Crystal, that supports a max drive level of 200 uW, but without a series resistor (0R). Is this a poor design or am I missing som...
Same problem here with a STM32H743. I'm trying this:void power_init(){ // Enable SYSCFG peripheral clock uint32_t apb4enr = RCC->APB4ENR; RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN; // Enter VOS1 mode (required before entering VOS0 mode) PWR...
