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Hi,I'm getting an exception stack on bootup:[ 3.882380] ------------[ cut here ]------------[ 3.886351] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:969 clk_core_disable+0xf0/0x2c4[ 3.894281] pll4_p already disabled[ 3.897839] Modules linked in:[ 3.90...
I'm getting the following log when trying to boot to a custom DTS. I've already attempted the suggestion mentioned in this st forum post (https://community.st.com/t5/stm32-mpus-products/op-tee-error-tzc-permission-failure-on-new-v5-0-0-sdk/td-p/58433...
It seems I am having the same problem here: https://community.st.com/s/question/0D50X0000Az4HdhSQE/cant-get-the-advertising-state?t=1613668936202. Except the solution for that question was to make sure the memory buffer was mapped properly to SRAM2 a...
STM32WB55xxI am using TIM1 CH1N and CH2N to create a pulse on each pin that lasts 1000 counts.The MX_TIM1_Init() is shown below. After this is set up (along with the clock configuration), I run HAL_TIMEx_OCN_Start_IT() on each channel and I see that ...