About Jpj.1

Jpj.1 · 2025-01-28

HiI need to flash both the cores of stm32h745zit3. Tried to flash the code using STMCube ide. But after reset pin pressed, cm4 is not getting run. Using ide i run both cores separately. And using programmer tried to load hex separately but it doesn'...

Jpj.1 · 2025-01-15

I am working with stm32h745ZIT3, in my application I need to receive some packets over ethernet in CM7 and these packets need to share to CM4, and processing is done in CM4. So, to test this data transfer I need to debug both cores simultaneously. Tr...

Jpj.1 · 2024-09-20

Hi,I am using stm32h745. I want to check the integrity of flash by checking crc checksum of the code in flash by storing the crc to last 4 bytes of flash. During image integrity check the calculated crc and stored crc need to compare. For this how sh...

Jpj.1 · 2020-12-12

Hi,I am using stm32f030 to read adc value(truestudio). ADC reads value on an interval of 10 minutes. It is observer that ADC reads value for first 5-6 times,and after that it reads 0v.The readings we get is also different from what is measured on adc...

Jpj.1 · 2025-01-29

LDO by hardwareAlso, earlier i used shared memory location at start of RAM_D2(0x30020000) with 3k size and RAM_D2 starts at0x30020BB9and now in working code i use start of RAM_D3(0x38000000) with size 3k.

Jpj.1 · 2025-01-29

No, that too doesn't work.I made a modification to below function by commenting while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}, but don't understand the impact. now after reset button pressed both cores starts running. void SystemClock_Config(void) ...

Jpj.1 · 2025-01-28

Hi I am using board developed by us with stm32h745. In both cores 2 different applications are loaded, in cm7 GPIO toggle and ethernet data send, while in cm4 data communication over UART. But after pressing reset button, ethernet communication and U...

Jpj.1 · 2025-01-22

CM7 only access Ethernet. Data received Via ethernet is shared to CM4 using shared memory allocated. No semaphores used. Busy Flags are used to check whether that shared location is accessed by other core.Also,#define MEM_SIZE 131048 /* (10k)*//*----...

Jpj.1 · 2025-01-22

HiNow I am able to debug both cores simultaneously withHow to implement inter-processor communication in ... - STMicroelectronics But now facing some memory allocation issue. I am using shared memory at location 0x30020000.MPU Configuration done in ...

User statistics

User Activity

stm32h745 dual core run configuration

Stm32h746 dual core debugging

Application image integrity on stm32h7 flash

STM32F030CC ADC reads 0

Re: stm32h745 dual core run configuration

Re: stm32h745 dual core run configuration

Re: stm32h745 dual core run configuration

Re: Stm32h746 dual core debugging

Re: Stm32h746 dual core debugging